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Record constants that need to be emitted in the assembly code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1010 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,6 +17,8 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/ConstPoolVals.h"
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#include "llvm/Method.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instruction.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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@ -299,6 +301,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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const MachineInstrDescriptor& instrDesc =
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target.getInstrInfo().getDescriptor(minstr->getOpCode());
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Method* method = vmInstr->getParent()->getParent();
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for (unsigned op=0; op < minstr->getNumOperands(); op++)
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{
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const MachineOperand& mop = minstr->getOperand(op);
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@ -330,8 +334,14 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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constantThatMustBeLoaded = true; // load is generated below
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else
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minstr->SetMachineOperand(op, opType, immedValue);
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}
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if (constantThatMustBeLoaded)
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{ // register the value so it is emitted in the assembly
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method->getMachineCode().addToConstantPool(
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cast<ConstPoolVal>(opValue));
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}
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}
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if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
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{ // opValue is a constant that must be explicitly loaded into a reg.
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TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr,
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@ -355,50 +365,19 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) ||
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isa<GlobalValue>(minstr->getImplicitRef(i)))
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{
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Value* oldVal = minstr->getImplicitRef(i);
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TmpInstruction* tmpReg =
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InsertCodeToLoadConstant(minstr->getImplicitRef(i), vmInstr,
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loadConstVec, target);
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InsertCodeToLoadConstant(oldVal, vmInstr, loadConstVec, target);
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minstr->setImplicitRef(i, tmpReg);
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if (isa<ConstPoolVal>(oldVal))
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{ // register the value so it is emitted in the assembly
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method->getMachineCode().addToConstantPool(
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cast<ConstPoolVal>(oldVal));
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}
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}
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return loadConstVec;
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}
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#undef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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#ifdef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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unsigned
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FixConstantOperands(const InstructionNode* vmInstrNode,
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TargetMachine& target)
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{
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Instruction* vmInstr = vmInstrNode->getInstruction();
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MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
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for (unsigned i=0; i < mvec.size(); i++)
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{
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vector<MachineInsr*> loadConstVec =
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FixConstantOperandsForInstr(mvec[i], target);
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}
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//
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// Finally, inserted the generated instructions in the vector
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// to be returned.
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//
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unsigned numNew = loadConstVec.size();
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if (numNew > 0)
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{
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// Insert the new instructions *before* the old ones by moving
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// the old ones over `numNew' positions (last-to-first, of course!).
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// We do check *after* returning that we did not exceed the vector mvec.
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for (int i=numInstr-1; i >= 0; i--)
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mvec[i+numNew] = mvec[i];
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for (unsigned i=0; i < numNew; i++)
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mvec[i] = loadConstVec[i];
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}
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return (numInstr + numNew);
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}
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#endif SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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@ -17,6 +17,8 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/ConstPoolVals.h"
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#include "llvm/Method.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instruction.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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@ -299,6 +301,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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const MachineInstrDescriptor& instrDesc =
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target.getInstrInfo().getDescriptor(minstr->getOpCode());
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Method* method = vmInstr->getParent()->getParent();
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for (unsigned op=0; op < minstr->getNumOperands(); op++)
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{
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const MachineOperand& mop = minstr->getOperand(op);
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@ -330,8 +334,14 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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constantThatMustBeLoaded = true; // load is generated below
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else
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minstr->SetMachineOperand(op, opType, immedValue);
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}
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if (constantThatMustBeLoaded)
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{ // register the value so it is emitted in the assembly
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method->getMachineCode().addToConstantPool(
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cast<ConstPoolVal>(opValue));
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}
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}
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if (constantThatMustBeLoaded || isa<GlobalValue>(opValue))
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{ // opValue is a constant that must be explicitly loaded into a reg.
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TmpInstruction* tmpReg = InsertCodeToLoadConstant(opValue, vmInstr,
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@ -355,50 +365,19 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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if (isa<ConstPoolVal>(minstr->getImplicitRef(i)) ||
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isa<GlobalValue>(minstr->getImplicitRef(i)))
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{
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Value* oldVal = minstr->getImplicitRef(i);
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TmpInstruction* tmpReg =
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InsertCodeToLoadConstant(minstr->getImplicitRef(i), vmInstr,
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loadConstVec, target);
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InsertCodeToLoadConstant(oldVal, vmInstr, loadConstVec, target);
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minstr->setImplicitRef(i, tmpReg);
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if (isa<ConstPoolVal>(oldVal))
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{ // register the value so it is emitted in the assembly
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method->getMachineCode().addToConstantPool(
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cast<ConstPoolVal>(oldVal));
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}
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}
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return loadConstVec;
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}
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#undef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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#ifdef SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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unsigned
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FixConstantOperands(const InstructionNode* vmInstrNode,
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TargetMachine& target)
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{
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Instruction* vmInstr = vmInstrNode->getInstruction();
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MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
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for (unsigned i=0; i < mvec.size(); i++)
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{
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vector<MachineInsr*> loadConstVec =
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FixConstantOperandsForInstr(mvec[i], target);
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}
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//
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// Finally, inserted the generated instructions in the vector
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// to be returned.
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//
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unsigned numNew = loadConstVec.size();
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if (numNew > 0)
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{
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// Insert the new instructions *before* the old ones by moving
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// the old ones over `numNew' positions (last-to-first, of course!).
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// We do check *after* returning that we did not exceed the vector mvec.
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for (int i=numInstr-1; i >= 0; i--)
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mvec[i+numNew] = mvec[i];
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for (unsigned i=0; i < numNew; i++)
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mvec[i] = loadConstVec[i];
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}
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return (numInstr + numNew);
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}
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#endif SAVE_TO_MOVE_BACK_TO_SPARCISSCPP
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