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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-14 17:34:41 +00:00
Replace some unnecessary vector copies with references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190770 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -502,7 +502,7 @@ void MachineLICM::HoistRegionPostRA() {
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// Walk the entire region, count number of defs for each register, and
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// collect potential LICM candidates.
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const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
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const std::vector<MachineBasicBlock *> &Blocks = CurLoop->getBlocks();
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
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MachineBasicBlock *BB = Blocks[i];
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@ -584,7 +584,7 @@ void MachineLICM::HoistRegionPostRA() {
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/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
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/// loop, and make sure it is not killed by any instructions in the loop.
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void MachineLICM::AddToLiveIns(unsigned Reg) {
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const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
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const std::vector<MachineBasicBlock *> &Blocks = CurLoop->getBlocks();
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
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MachineBasicBlock *BB = Blocks[i];
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if (!BB->isLiveIn(Reg))
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@ -164,7 +164,7 @@ const BlockAddress *ARMConstantPoolConstant::getBlockAddress() const {
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int ARMConstantPoolConstant::getExistingMachineCPValue(MachineConstantPool *CP,
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unsigned Alignment) {
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unsigned AlignMask = Alignment - 1;
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const std::vector<MachineConstantPoolEntry> Constants = CP->getConstants();
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const std::vector<MachineConstantPoolEntry> &Constants = CP->getConstants();
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for (unsigned i = 0, e = Constants.size(); i != e; ++i) {
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if (Constants[i].isMachineConstantPoolEntry() &&
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(Constants[i].getAlignment() & AlignMask) == 0) {
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@ -217,7 +217,7 @@ ARMConstantPoolSymbol::Create(LLVMContext &C, const char *s,
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int ARMConstantPoolSymbol::getExistingMachineCPValue(MachineConstantPool *CP,
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unsigned Alignment) {
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unsigned AlignMask = Alignment - 1;
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const std::vector<MachineConstantPoolEntry> Constants = CP->getConstants();
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const std::vector<MachineConstantPoolEntry> &Constants = CP->getConstants();
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for (unsigned i = 0, e = Constants.size(); i != e; ++i) {
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if (Constants[i].isMachineConstantPoolEntry() &&
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(Constants[i].getAlignment() & AlignMask) == 0) {
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@ -272,7 +272,7 @@ ARMConstantPoolMBB *ARMConstantPoolMBB::Create(LLVMContext &C,
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int ARMConstantPoolMBB::getExistingMachineCPValue(MachineConstantPool *CP,
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unsigned Alignment) {
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unsigned AlignMask = Alignment - 1;
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const std::vector<MachineConstantPoolEntry> Constants = CP->getConstants();
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const std::vector<MachineConstantPoolEntry> &Constants = CP->getConstants();
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for (unsigned i = 0, e = Constants.size(); i != e; ++i) {
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if (Constants[i].isMachineConstantPoolEntry() &&
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(Constants[i].getAlignment() & AlignMask) == 0) {
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@ -871,7 +871,7 @@ bool HexagonHardwareLoops::isInvalidLoopOperation(
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/// \brief - Return true if the loop contains an instruction that inhibits
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/// the use of the hardware loop function.
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bool HexagonHardwareLoops::containsInvalidInstruction(MachineLoop *L) const {
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const std::vector<MachineBasicBlock*> Blocks = L->getBlocks();
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const std::vector<MachineBasicBlock *> &Blocks = L->getBlocks();
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
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MachineBasicBlock *MBB = Blocks[i];
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for (MachineBasicBlock::iterator
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@ -39,7 +39,7 @@ unsigned SystemZConstantPoolValue::getRelocationInfo() const {
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int SystemZConstantPoolValue::
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getExistingMachineCPValue(MachineConstantPool *CP, unsigned Alignment) {
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unsigned AlignMask = Alignment - 1;
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const std::vector<MachineConstantPoolEntry> Constants = CP->getConstants();
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const std::vector<MachineConstantPoolEntry> &Constants = CP->getConstants();
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for (unsigned I = 0, E = Constants.size(); I != E; ++I) {
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if (Constants[I].isMachineConstantPoolEntry() &&
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(Constants[I].getAlignment() & AlignMask) == 0) {
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@ -239,8 +239,6 @@ bool llvm::UnrollLoop(Loop *L, unsigned Count, unsigned TripCount,
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DEBUG(dbgs() << "!\n");
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}
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std::vector<BasicBlock*> LoopBlocks = L->getBlocks();
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bool ContinueOnTrue = L->contains(BI->getSuccessor(0));
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BasicBlock *LoopExit = BI->getSuccessor(ContinueOnTrue);
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@ -121,7 +121,7 @@ void RegisterInfoEmitter::runEnums(raw_ostream &OS,
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OS << "}\n";
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}
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const std::vector<Record*> RegAltNameIndices = Target.getRegAltNameIndices();
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const std::vector<Record*> &RegAltNameIndices = Target.getRegAltNameIndices();
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// If the only definition is the default NoRegAltName, we don't need to
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// emit anything.
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if (RegAltNameIndices.size() > 1) {
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