mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
Implement folding of loads into floating point operations. This implements:
test/Regression/CodeGen/X86/fp_load_fold.llx git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12844 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
2d9de9d0cb
commit
95157f7638
@ -1775,7 +1775,6 @@ static bool isSafeToFoldLoadIntoInstruction(LoadInst &LI, Instruction &User) {
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return true;
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}
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/// visitSimpleBinary - Implement simple binary operators for integral types...
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/// OperatorClass is one of: 0 for Add, 1 for Sub, 2 for And, 3 for Or, 4 for
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/// Xor.
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@ -1791,22 +1790,31 @@ void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
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std::swap(Op0, Op1); // Make sure any loads are in the RHS.
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unsigned Class = getClassB(B.getType());
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if (isa<LoadInst>(Op1) && Class < cFP &&
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if (isa<LoadInst>(Op1) && Class != cLong &&
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isSafeToFoldLoadIntoInstruction(*cast<LoadInst>(Op1), B)) {
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static const unsigned OpcodeTab[][3] = {
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// Arithmetic operators
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{ X86::ADD8rm, X86::ADD16rm, X86::ADD32rm }, // ADD
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{ X86::SUB8rm, X86::SUB16rm, X86::SUB32rm }, // SUB
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// Bitwise operators
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{ X86::AND8rm, X86::AND16rm, X86::AND32rm }, // AND
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{ X86:: OR8rm, X86:: OR16rm, X86:: OR32rm }, // OR
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{ X86::XOR8rm, X86::XOR16rm, X86::XOR32rm }, // XOR
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};
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assert(Class < cFP && "General code handles 64-bit integer types!");
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unsigned Opcode = OpcodeTab[OperatorClass][Class];
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unsigned Opcode;
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if (Class != cFP) {
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static const unsigned OpcodeTab[][3] = {
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// Arithmetic operators
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{ X86::ADD8rm, X86::ADD16rm, X86::ADD32rm }, // ADD
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{ X86::SUB8rm, X86::SUB16rm, X86::SUB32rm }, // SUB
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// Bitwise operators
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{ X86::AND8rm, X86::AND16rm, X86::AND32rm }, // AND
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{ X86:: OR8rm, X86:: OR16rm, X86:: OR32rm }, // OR
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{ X86::XOR8rm, X86::XOR16rm, X86::XOR32rm }, // XOR
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};
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Opcode = OpcodeTab[OperatorClass][Class];
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} else {
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static const unsigned OpcodeTab[][2] = {
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{ X86::FADD32m, X86::FADD64m }, // ADD
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{ X86::FSUB32m, X86::FSUB64m }, // SUB
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};
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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Opcode = OpcodeTab[OperatorClass][Ty == Type::DoubleTy];
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}
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(cast<LoadInst>(Op1)->getOperand(0), BaseReg,
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@ -1818,6 +1826,25 @@ void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
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return;
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}
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// If this is a floating point subtract, check to see if we can fold the first
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// operand in.
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if (Class == cFP && OperatorClass == 1 &&
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isa<LoadInst>(Op0) &&
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isSafeToFoldLoadIntoInstruction(*cast<LoadInst>(Op0), B)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FSUBR32m : X86::FSUBR64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(cast<LoadInst>(Op0)->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op1r = getReg(Op1);
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addFullAddress(BuildMI(BB, Opcode, 2, DestReg).addReg(Op1r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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emitSimpleBinaryOperation(BB, MI, Op0, Op1, OperatorClass, DestReg);
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}
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@ -2146,8 +2173,33 @@ void ISel::doMultiplyConst(MachineBasicBlock *MBB,
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void ISel::visitMul(BinaryOperator &I) {
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unsigned ResultReg = getReg(I);
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Value *Op0 = I.getOperand(0);
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Value *Op1 = I.getOperand(1);
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// Fold loads into floating point multiplies.
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if (getClass(Op0->getType()) == cFP) {
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if (isa<LoadInst>(Op0) && !isa<LoadInst>(Op1))
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if (!I.swapOperands())
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std::swap(Op0, Op1); // Make sure any loads are in the RHS.
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if (LoadInst *LI = dyn_cast<LoadInst>(Op1))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FMUL32m : X86::FMUL64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op0r = getReg(Op0);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op0r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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}
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MachineBasicBlock::iterator IP = BB->end();
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emitMultiply(BB, IP, I.getOperand(0), I.getOperand(1), ResultReg);
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emitMultiply(BB, IP, Op0, Op1, ResultReg);
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}
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void ISel::emitMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
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@ -2264,9 +2316,46 @@ void ISel::emitMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
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///
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void ISel::visitDivRem(BinaryOperator &I) {
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unsigned ResultReg = getReg(I);
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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// Fold loads into floating point divides.
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if (getClass(Op0->getType()) == cFP) {
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if (LoadInst *LI = dyn_cast<LoadInst>(Op1))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FDIV32m : X86::FDIV64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op0r = getReg(Op0);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op0r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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if (LoadInst *LI = dyn_cast<LoadInst>(Op0))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FDIVR32m : X86::FDIVR64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op1r = getReg(Op1);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op1r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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}
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MachineBasicBlock::iterator IP = BB->end();
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emitDivRemOperation(BB, IP, I.getOperand(0), I.getOperand(1),
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emitDivRemOperation(BB, IP, Op0, Op1,
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I.getOpcode() == Instruction::Div, ResultReg);
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}
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@ -2531,16 +2620,22 @@ void ISel::visitLoadInst(LoadInst &I) {
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// Check to see if this load instruction is going to be folded into a binary
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// instruction, like add. If so, we don't want to emit it. Wouldn't a real
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// pattern matching instruction selector be nice?
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if (I.hasOneUse() && getClassB(I.getType()) < cFP) {
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unsigned Class = getClassB(I.getType());
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if (I.hasOneUse() && Class != cLong) {
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Instruction *User = cast<Instruction>(I.use_back());
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switch (User->getOpcode()) {
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default: User = 0; break;
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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break;
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case Instruction::Mul:
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case Instruction::Div:
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if (Class == cFP)
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break; // Folding only implemented for floating point.
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// fall through.
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default: User = 0; break;
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}
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if (User) {
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@ -2556,6 +2651,15 @@ void ISel::visitLoadInst(LoadInst &I) {
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if (User->getOperand(1) == &I &&
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isSafeToFoldLoadIntoInstruction(I, *User))
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return; // Eliminate the load!
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// If this is a floating point sub or div, we won't be able to swap the
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// operands, but we will still be able to eliminate the load.
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if (Class == cFP && User->getOperand(0) == &I &&
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!isa<LoadInst>(User->getOperand(1)) &&
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(User->getOpcode() == Instruction::Sub ||
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User->getOpcode() == Instruction::Div) &&
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isSafeToFoldLoadIntoInstruction(I, *User))
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return; // Eliminate the load!
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}
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}
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@ -2563,7 +2667,6 @@ void ISel::visitLoadInst(LoadInst &I) {
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unsigned BaseReg = 0, Scale = 1, IndexReg = 0, Disp = 0;
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getAddressingMode(I.getOperand(0), BaseReg, Scale, IndexReg, Disp);
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unsigned Class = getClassB(I.getType());
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if (Class == cLong) {
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addFullAddress(BuildMI(BB, X86::MOV32rm, 4, DestReg),
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BaseReg, Scale, IndexReg, Disp);
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@ -1775,7 +1775,6 @@ static bool isSafeToFoldLoadIntoInstruction(LoadInst &LI, Instruction &User) {
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return true;
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}
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/// visitSimpleBinary - Implement simple binary operators for integral types...
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/// OperatorClass is one of: 0 for Add, 1 for Sub, 2 for And, 3 for Or, 4 for
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/// Xor.
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@ -1791,22 +1790,31 @@ void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
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std::swap(Op0, Op1); // Make sure any loads are in the RHS.
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unsigned Class = getClassB(B.getType());
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if (isa<LoadInst>(Op1) && Class < cFP &&
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if (isa<LoadInst>(Op1) && Class != cLong &&
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isSafeToFoldLoadIntoInstruction(*cast<LoadInst>(Op1), B)) {
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static const unsigned OpcodeTab[][3] = {
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// Arithmetic operators
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{ X86::ADD8rm, X86::ADD16rm, X86::ADD32rm }, // ADD
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{ X86::SUB8rm, X86::SUB16rm, X86::SUB32rm }, // SUB
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// Bitwise operators
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{ X86::AND8rm, X86::AND16rm, X86::AND32rm }, // AND
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{ X86:: OR8rm, X86:: OR16rm, X86:: OR32rm }, // OR
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{ X86::XOR8rm, X86::XOR16rm, X86::XOR32rm }, // XOR
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};
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assert(Class < cFP && "General code handles 64-bit integer types!");
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unsigned Opcode = OpcodeTab[OperatorClass][Class];
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unsigned Opcode;
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if (Class != cFP) {
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static const unsigned OpcodeTab[][3] = {
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// Arithmetic operators
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{ X86::ADD8rm, X86::ADD16rm, X86::ADD32rm }, // ADD
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{ X86::SUB8rm, X86::SUB16rm, X86::SUB32rm }, // SUB
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// Bitwise operators
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{ X86::AND8rm, X86::AND16rm, X86::AND32rm }, // AND
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{ X86:: OR8rm, X86:: OR16rm, X86:: OR32rm }, // OR
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{ X86::XOR8rm, X86::XOR16rm, X86::XOR32rm }, // XOR
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};
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Opcode = OpcodeTab[OperatorClass][Class];
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} else {
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static const unsigned OpcodeTab[][2] = {
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{ X86::FADD32m, X86::FADD64m }, // ADD
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{ X86::FSUB32m, X86::FSUB64m }, // SUB
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};
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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Opcode = OpcodeTab[OperatorClass][Ty == Type::DoubleTy];
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}
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(cast<LoadInst>(Op1)->getOperand(0), BaseReg,
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@ -1818,6 +1826,25 @@ void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
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return;
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}
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// If this is a floating point subtract, check to see if we can fold the first
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// operand in.
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if (Class == cFP && OperatorClass == 1 &&
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isa<LoadInst>(Op0) &&
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isSafeToFoldLoadIntoInstruction(*cast<LoadInst>(Op0), B)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FSUBR32m : X86::FSUBR64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(cast<LoadInst>(Op0)->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op1r = getReg(Op1);
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addFullAddress(BuildMI(BB, Opcode, 2, DestReg).addReg(Op1r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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emitSimpleBinaryOperation(BB, MI, Op0, Op1, OperatorClass, DestReg);
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}
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@ -2146,8 +2173,33 @@ void ISel::doMultiplyConst(MachineBasicBlock *MBB,
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void ISel::visitMul(BinaryOperator &I) {
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unsigned ResultReg = getReg(I);
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Value *Op0 = I.getOperand(0);
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Value *Op1 = I.getOperand(1);
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// Fold loads into floating point multiplies.
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if (getClass(Op0->getType()) == cFP) {
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if (isa<LoadInst>(Op0) && !isa<LoadInst>(Op1))
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if (!I.swapOperands())
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std::swap(Op0, Op1); // Make sure any loads are in the RHS.
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if (LoadInst *LI = dyn_cast<LoadInst>(Op1))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FMUL32m : X86::FMUL64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op0r = getReg(Op0);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op0r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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}
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MachineBasicBlock::iterator IP = BB->end();
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emitMultiply(BB, IP, I.getOperand(0), I.getOperand(1), ResultReg);
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emitMultiply(BB, IP, Op0, Op1, ResultReg);
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}
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void ISel::emitMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
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@ -2264,9 +2316,46 @@ void ISel::emitMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
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///
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void ISel::visitDivRem(BinaryOperator &I) {
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unsigned ResultReg = getReg(I);
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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// Fold loads into floating point divides.
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if (getClass(Op0->getType()) == cFP) {
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if (LoadInst *LI = dyn_cast<LoadInst>(Op1))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FDIV32m : X86::FDIV64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op0r = getReg(Op0);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op0r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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if (LoadInst *LI = dyn_cast<LoadInst>(Op0))
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if (isSafeToFoldLoadIntoInstruction(*LI, I)) {
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const Type *Ty = Op0->getType();
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assert(Ty == Type::FloatTy||Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned Opcode = Ty == Type::FloatTy ? X86::FDIVR32m : X86::FDIVR64m;
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unsigned BaseReg, Scale, IndexReg, Disp;
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getAddressingMode(LI->getOperand(0), BaseReg,
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Scale, IndexReg, Disp);
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unsigned Op1r = getReg(Op1);
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addFullAddress(BuildMI(BB, Opcode, 2, ResultReg).addReg(Op1r),
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BaseReg, Scale, IndexReg, Disp);
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return;
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}
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}
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MachineBasicBlock::iterator IP = BB->end();
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emitDivRemOperation(BB, IP, I.getOperand(0), I.getOperand(1),
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emitDivRemOperation(BB, IP, Op0, Op1,
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I.getOpcode() == Instruction::Div, ResultReg);
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}
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@ -2531,16 +2620,22 @@ void ISel::visitLoadInst(LoadInst &I) {
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// Check to see if this load instruction is going to be folded into a binary
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// instruction, like add. If so, we don't want to emit it. Wouldn't a real
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// pattern matching instruction selector be nice?
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if (I.hasOneUse() && getClassB(I.getType()) < cFP) {
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unsigned Class = getClassB(I.getType());
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if (I.hasOneUse() && Class != cLong) {
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Instruction *User = cast<Instruction>(I.use_back());
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switch (User->getOpcode()) {
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default: User = 0; break;
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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break;
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case Instruction::Mul:
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case Instruction::Div:
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if (Class == cFP)
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break; // Folding only implemented for floating point.
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// fall through.
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default: User = 0; break;
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}
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if (User) {
|
||||
@ -2556,6 +2651,15 @@ void ISel::visitLoadInst(LoadInst &I) {
|
||||
if (User->getOperand(1) == &I &&
|
||||
isSafeToFoldLoadIntoInstruction(I, *User))
|
||||
return; // Eliminate the load!
|
||||
|
||||
// If this is a floating point sub or div, we won't be able to swap the
|
||||
// operands, but we will still be able to eliminate the load.
|
||||
if (Class == cFP && User->getOperand(0) == &I &&
|
||||
!isa<LoadInst>(User->getOperand(1)) &&
|
||||
(User->getOpcode() == Instruction::Sub ||
|
||||
User->getOpcode() == Instruction::Div) &&
|
||||
isSafeToFoldLoadIntoInstruction(I, *User))
|
||||
return; // Eliminate the load!
|
||||
}
|
||||
}
|
||||
|
||||
@ -2563,7 +2667,6 @@ void ISel::visitLoadInst(LoadInst &I) {
|
||||
unsigned BaseReg = 0, Scale = 1, IndexReg = 0, Disp = 0;
|
||||
getAddressingMode(I.getOperand(0), BaseReg, Scale, IndexReg, Disp);
|
||||
|
||||
unsigned Class = getClassB(I.getType());
|
||||
if (Class == cLong) {
|
||||
addFullAddress(BuildMI(BB, X86::MOV32rm, 4, DestReg),
|
||||
BaseReg, Scale, IndexReg, Disp);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user