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If there is a def of a super-register followed by a use of a sub-register, do *not* add an implicit def of the sub-register. e.g.

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EAX = ..., AX<imp-def>
...
    = AX

This creates a double-def. Apparently this used to be necessary but is no longer needed.

Thanks to Anton for pointing this out. Anton, I cannot create a test case without your uncommitted ARM patches. Please check in a test case for me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72755 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-06-03 05:15:46 +00:00
parent a321dcd38d
commit 95299c194d
1 changed files with 0 additions and 14 deletions
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14
lib/CodeGen/LiveVariables.cpp
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@ -242,20 +242,6 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
}
}
// There was an earlier def of a super-register. Add implicit def to that MI.
//
// A: EAX = ...
// B: ... = AX
//
// Add implicit def to A if there isn't a use of AX (or EAX) before B.
if (!PhysRegUse[Reg]) {
MachineInstr *Def = PhysRegDef[Reg];
if (Def && !Def->modifiesRegister(Reg))
Def->addOperand(MachineOperand::CreateReg(Reg,
true /*IsDef*/,
true /*IsImp*/));
}
// Remember this use.
PhysRegUse[Reg] = MI;
for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);