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R600 -> AMDGPU rename

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2015-06-13 03:28:10 +00:00
parent 8b8b72ef03
commit 953c681473
552 changed files with 62 additions and 60 deletions
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31
test/CodeGen/AMDGPU/texture-input-merge.ll Normal file
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
;CHECK-NOT: MOV
define void @test(<4 x float> inreg %reg0) #0 {
%1 = extractelement <4 x float> %reg0, i32 0
%2 = extractelement <4 x float> %reg0, i32 1
%3 = extractelement <4 x float> %reg0, i32 2
%4 = extractelement <4 x float> %reg0, i32 3
%5 = fmul float %1, 3.0
%6 = fmul float %2, 3.0
%7 = fmul float %3, 3.0
%8 = fmul float %4, 3.0
%9 = insertelement <4 x float> undef, float %5, i32 0
%10 = insertelement <4 x float> %9, float %6, i32 1
%11 = insertelement <4 x float> undef, float %7, i32 0
%12 = insertelement <4 x float> %11, float %5, i32 1
%13 = insertelement <4 x float> undef, float %8, i32 0
%14 = call <4 x float> @llvm.R600.tex(<4 x float> %10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
%15 = call <4 x float> @llvm.R600.tex(<4 x float> %12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
%16 = call <4 x float> @llvm.R600.tex(<4 x float> %13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
%17 = fadd <4 x float> %14, %15
%18 = fadd <4 x float> %17, %16
call void @llvm.R600.store.swizzle(<4 x float> %18, i32 0, i32 0)
ret void
}
declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone
declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
attributes #0 = { "ShaderType"="1" }