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Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jeffrey Yasskin 2011-01-18 00:51:23 +00:00
parent f22432282c
commit 955ed73d12
5 changed files with 0 additions and 17 deletions
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1
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -1030,7 +1030,6 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
case ISD::ATOMIC_LOAD_UMIN: case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX: case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_SWAP: { case ISD::ATOMIC_SWAP: {
SDValue Ch = N->getOperand(0);
std::pair<SDValue, SDValue> Tmp = ExpandAtomic(N); std::pair<SDValue, SDValue> Tmp = ExpandAtomic(N);
SplitInteger(Tmp.first, Lo, Hi); SplitInteger(Tmp.first, Lo, Hi);
ReplaceValueWith(SDValue(N, 1), Tmp.second); ReplaceValueWith(SDValue(N, 1), Tmp.second);

4
lib/Target/ARM/ARMFastISel.cpp
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@ -1017,21 +1017,17 @@ bool ARMFastISel::SelectBranch(const Instruction *I) {
return false; return false;
unsigned CmpOpc; unsigned CmpOpc;
unsigned CondReg;
switch (VT.SimpleTy) { switch (VT.SimpleTy) {
default: return false; default: return false;
// TODO: Verify compares. // TODO: Verify compares.
case MVT::f32: case MVT::f32:
CmpOpc = ARM::VCMPES; CmpOpc = ARM::VCMPES;
CondReg = ARM::FPSCR;
break; break;
case MVT::f64: case MVT::f64:
CmpOpc = ARM::VCMPED; CmpOpc = ARM::VCMPED;
CondReg = ARM::FPSCR;
break; break;
case MVT::i32: case MVT::i32:
CmpOpc = isThumb ? ARM::t2CMPrr : ARM::CMPrr; CmpOpc = isThumb ? ARM::t2CMPrr : ARM::CMPrr;
CondReg = ARM::CPSR;
break; break;
} }

2
lib/Target/ARM/ARMFrameLowering.cpp
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@ -655,7 +655,6 @@ bool ARMFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
DebugLoc DL = MI->getDebugLoc();
unsigned PushOpc = AFI->isThumbFunction() ? ARM::t2STMDB_UPD : ARM::STMDB_UPD; unsigned PushOpc = AFI->isThumbFunction() ? ARM::t2STMDB_UPD : ARM::STMDB_UPD;
unsigned PushOneOpc = AFI->isThumbFunction() ? ARM::t2STR_PRE : ARM::STR_PRE; unsigned PushOneOpc = AFI->isThumbFunction() ? ARM::t2STR_PRE : ARM::STR_PRE;
@ -677,7 +676,6 @@ bool ARMFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
bool isVarArg = AFI->getVarArgsRegSaveSize() > 0; bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
DebugLoc DL = MI->getDebugLoc();
unsigned PopOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_UPD : ARM::LDMIA_UPD; unsigned PopOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_UPD : ARM::LDMIA_UPD;
unsigned LdrOpc = AFI->isThumbFunction() ? ARM::t2LDR_POST : ARM::LDR_POST; unsigned LdrOpc = AFI->isThumbFunction() ? ARM::t2LDR_POST : ARM::LDR_POST;

9
lib/Target/CellSPU/SPUISelLowering.cpp
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@ -682,10 +682,6 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
// storage position offset from lower 16 byte aligned memory chunk // storage position offset from lower 16 byte aligned memory chunk
SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32, SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32,
basePtr, DAG.getConstant( 0xf, MVT::i32 ) ); basePtr, DAG.getConstant( 0xf, MVT::i32 ) );
// 16 - offset
SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32,
DAG.getConstant( 16, MVT::i32),
offset );
// get a registerfull of ones. (this implementation is a workaround: LLVM // get a registerfull of ones. (this implementation is a workaround: LLVM
// cannot handle 128 bit signed int constants) // cannot handle 128 bit signed int constants)
SDValue ones = DAG.getConstant(-1, MVT::v4i32 ); SDValue ones = DAG.getConstant(-1, MVT::v4i32 );
@ -910,10 +906,6 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32, SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32,
DAG.getConstant( 16, MVT::i32), DAG.getConstant( 16, MVT::i32),
offset); offset);
SDValue hi_shift = DAG.getNode(ISD::SUB, dl, MVT::i32,
DAG.getConstant( VT.getSizeInBits()/8,
MVT::i32),
offset_compl);
// 16 - sizeof(Value) // 16 - sizeof(Value)
SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32, SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32,
DAG.getConstant( 16, MVT::i32), DAG.getConstant( 16, MVT::i32),
@ -3259,4 +3251,3 @@ SPUTargetLowering::isLegalAddressingMode(const AddrMode &AM,
return false; return false;
} }

1
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -1176,7 +1176,6 @@ SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op, SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
SelectionDAG &DAG) const { SelectionDAG &DAG) const {
EVT PtrVT = Op.getValueType(); EVT PtrVT = Op.getValueType();
DebugLoc DL = Op.getDebugLoc();
const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();