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ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same

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as for VDUP32d and VDUP32q, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-03-11 20:44:08 +00:00
parent 81bb6551e6
commit 958108ad14
2 changed files with 2 additions and 14 deletions
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6
utils/TableGen/ARMDecoderEmitter.cpp
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@ -1632,12 +1632,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
Name == "BLX_pred" || Name == "TPsoft")
return false;
// Ignore VDUPf[d|q] instructions known to conflict with VDUP32[d-q] for
// decoding. The instruction duplicates an element from an ARM core
// register into every element of the destination vector. There is no
// distinction between data types.
if (Name == "VDUPfd" || Name == "VDUPfq") return false;
// A8-598: VEXT
// Vector Extract extracts elements from the bottom end of the second
// operand vector and the top end of the first, concatenates them and