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more dbg_value adjustments so debug info doesn't affect codegen

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105454 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-06-04 01:23:30 +00:00
parent f62546ab04
commit 958e4e1967
1 changed files with 4 additions and 2 deletions
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6
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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@ -1291,7 +1291,7 @@ static bool IsSafeAndProfitableToMove(bool isLd, unsigned Base,
// some day. // some day.
SmallSet<unsigned, 4> AddedRegPressure; SmallSet<unsigned, 4> AddedRegPressure;
while (++I != E) { while (++I != E) {
if (MemOps.count(&*I)) if (I->isDebugValue() || MemOps.count(&*I))
continue; continue;
const TargetInstrDesc &TID = I->getDesc(); const TargetInstrDesc &TID = I->getDesc();
if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects())
@ -1574,7 +1574,9 @@ ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) {
break; break;
} }
MI2LocMap[MI] = Loc++; if (!MI->isDebugValue())
MI2LocMap[MI] = ++Loc;
if (!isMemoryOp(MI)) if (!isMemoryOp(MI))
continue; continue;
unsigned PredReg = 0; unsigned PredReg = 0;