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we have a shuffle instr, add an example.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27592 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2006-04-11 18:47:03 +00:00
parent df3c33c57e
commit 95c7570f32
1 changed files with 6 additions and 5 deletions
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11
lib/Target/PowerPC/README_ALTIVEC.txt
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@ -96,11 +96,6 @@ instructions.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
We need an LLVM 'shuffle' instruction, that corresponds to the VECTOR_SHUFFLE
node.
//===----------------------------------------------------------------------===//
We need a way to teach tblgen that some operands of an intrinsic are required to We need a way to teach tblgen that some operands of an intrinsic are required to
be constants. The verifier should enforce this constraint. be constants. The verifier should enforce this constraint.
@ -133,4 +128,10 @@ There are a wide variety of vector_shuffle operations that we can do with a pair
of instructions (e.g. a vsldoi + vpkuhum). We should pattern match these, but of instructions (e.g. a vsldoi + vpkuhum). We should pattern match these, but
there are a huge number of these. there are a huge number of these.
Specific examples:
C = vector_shuffle A, B, <0, 1, 2, 4>
-> t = vsldoi A, A, 12
-> C = vsldoi A, B, 4
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//