-The first argument to this intrinsic indicates the hardware I/O address to -which data should be written. The address is in the hardware I/O address -namespace (as opposed to being a memory location for memory mapped I/O). +The first argument is the value to write to the I/O port.
-The second argument is the value to write to the I/O port. +The second argument indicates the hardware I/O address to which data should be +written. The address is in the hardware I/O address namespace (as opposed to +being a memory location for memory mapped I/O).
- call <integer type> (<integer type>)* %llvm.readio (<integer type> <address>) + call <result> (<ty>*)* %llvm.readio (<ty> * <pointer>)
-The argument to this intrinsic indicates the memory address from which to read -the data. +The argument to this intrinsic is a pointer indicating the memory address from +which to read the data. The data must be a +first class type.
The 'llvm.readio' intrinsic reads data from a memory mapped I/O -location specified by address and returns the value. The address and -return value must be integers, but the size allowed for each is dependent upon -the platform upon which the program is code generated. +location specified by pointer and returns the value. The argument must +be a pointer, and the return value must be a +first class type. However, certain architectures +may not support I/O on all first class types. For example, 32 bit processors +may only support I/O on data types that are 32 bits or less.
-This intrinsic ensures that the I/O data read occurs in instruction order in -relation to other I/O data reads and writes (as opposed to a normal load, where -hardware scheduling can re-arrange the actual memory accesses to occur out of -order). +This intrinsic enforces an in-order memory model for llvm.readio and +llvm.writeio calls on machines that use dynamic scheduling. Dynamically +scheduled processors may execute loads and stores out of order, re-ordering at +run time accesses to memory mapped I/O registers. Using these intrinsics +ensures that accesses to memory mapped I/O registers occur in program order.
@@ -2151,7 +2155,7 @@ order).- call void (<integer type>, <integer type>)* %llvm.writeio (<integer type> <value>, <integer type> <address>) + call void (<ty1>, <ty2>*)* %llvm.writeio (<ty1> <value>, <ty2> * <pointer>)
-The first argument to this intrinsic indicates the memory address to which data -should be written. -
- --The second argument is the value to write to the memory mapped I/O location. +The first argument is the value to write to the memory mapped I/O location. +The second argument is a pointer indicating the memory address to which the +data should be written.
The 'llvm.writeio' intrinsic writes value to the memory mapped -I/O address specified by address. The address and value must be -integers, but the size is dependent upon the platform upon which the program is -code generated. +I/O address specified by pointer. The value must be a +first class type. However, certain architectures +may not support I/O on all first class types. For example, 32 bit processors +may only support I/O on data types that are 32 bits or less.
-This intrinsic ensures that the I/O data write occurs in instruction order in -relation to other I/O data reads and writes (as opposed to a normal store, -where hardware scheduling can re-arrange the actual memory accesses to occur -out of order). +This intrinsic enforces an in-order memory model for llvm.readio and +llvm.writeio calls on machines that use dynamic scheduling. Dynamically +scheduled processors may execute loads and stores out of order, re-ordering at +run time accesses to memory mapped I/O registers. Using these intrinsics +ensures that accesses to memory mapped I/O registers occur in program order.