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[mips] Implement llvm.trap intrinsic.
Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187244 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -385,6 +385,8 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setTruncStoreAction(MVT::i64, MVT::i32, Custom);
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setTruncStoreAction(MVT::i64, MVT::i32, Custom);
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}
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}
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setOperationAction(ISD::TRAP, MVT::Other, Legal);
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setTargetDAGCombine(ISD::SDIVREM);
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setTargetDAGCombine(ISD::SDIVREM);
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setTargetDAGCombine(ISD::UDIVREM);
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setTargetDAGCombine(ISD::UDIVREM);
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setTargetDAGCombine(ISD::SELECT);
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setTargetDAGCombine(ISD::SELECT);
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@ -826,6 +826,11 @@ class SCBase<string opstr, RegisterOperand RO, Operand Mem> :
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class MFC3OP<dag outs, dag ins, string asmstr> :
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class MFC3OP<dag outs, dag ins, string asmstr> :
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InstSE<outs, ins, asmstr, [], NoItinerary, FrmFR>;
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InstSE<outs, ins, asmstr, [], NoItinerary, FrmFR>;
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let isBarrier = 1, isTerminator = 1, isCodeGenOnly = 1 in
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def TRAP : InstSE<(outs), (ins), "break", [(trap)], NoItinerary, FrmOther> {
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let Inst = 0x0000000d;
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Pseudo instructions
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// Pseudo instructions
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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11
test/CodeGen/Mips/trap.ll
Normal file
11
test/CodeGen/Mips/trap.ll
Normal file
@ -0,0 +1,11 @@
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; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s
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declare void @llvm.trap()
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define void @f1() {
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entry:
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call void @llvm.trap()
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unreachable
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; CHECK: break
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}
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