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remove some dead code. t2addrmode_imm8s4 is never used in a
pattern, so there is no need to define a matching function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113122 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -113,8 +113,6 @@ public:
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SDValue &OffImm);
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bool SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
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SDValue &OffImm);
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bool SelectT2AddrModeImm8s4(SDNode *Op, SDValue N, SDValue &Base,
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SDValue &OffImm);
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bool SelectT2AddrModeSoReg(SDNode *Op, SDValue N, SDValue &Base,
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SDValue &OffReg, SDValue &ShImm);
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@ -797,34 +795,6 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
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return false;
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}
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bool ARMDAGToDAGISel::SelectT2AddrModeImm8s4(SDNode *Op, SDValue N,
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SDValue &Base, SDValue &OffImm) {
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if (N.getOpcode() == ISD::ADD) {
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if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
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int RHSC = (int)RHS->getZExtValue();
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// 8 bits.
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if (((RHSC & 0x3) == 0) &&
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((RHSC >= 0 && RHSC < 0x400) || (RHSC < 0 && RHSC > -0x400))) {
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Base = N.getOperand(0);
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OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
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return true;
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}
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}
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} else if (N.getOpcode() == ISD::SUB) {
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if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
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int RHSC = (int)RHS->getZExtValue();
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// 8 bits.
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if (((RHSC & 0x3) == 0) && (RHSC >= 0 && RHSC < 0x400)) {
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Base = N.getOperand(0);
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OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32);
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return true;
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}
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}
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}
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return false;
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}
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bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDNode *Op, SDValue N,
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SDValue &Base,
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SDValue &OffReg, SDValue &ShImm) {
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@ -145,8 +145,7 @@ def t2am_imm8_offset : Operand<i32>,
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}
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// t2addrmode_imm8s4 := reg +/- (imm8 << 2)
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def t2addrmode_imm8s4 : Operand<i32>,
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ComplexPattern<i32, 2, "SelectT2AddrModeImm8s4", []> {
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def t2addrmode_imm8s4 : Operand<i32> {
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let PrintMethod = "printT2AddrModeImm8s4Operand";
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let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
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}
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