6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-24 22:24:54 +00:00
Code Issues Projects Releases Wiki Activity

Pass extra regclasses into spilling code

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-09-30 01:29:42 +00:00
parent bf9716b9c4
commit 97d5e6461a
12 changed files with 49 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/Skeleton/SkeletonRegisterInfo.cpp
View File

@@ -22,13 +22,15 @@ SkeletonRegisterInfo::SkeletonRegisterInfo()
void SkeletonRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned SrcReg, int FrameIdx) const {
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const {
abort();
}
void SkeletonRegisterInfo::
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIdx) const {
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC) const {
abort();
}

8
lib/Target/Skeleton/SkeletonRegisterInfo.h
View File

@@ -1,4 +1,4 @@
//===- SkeletonRegisterInfo.h - Skeleton Register Information Impl -*- C++ -*-==//
//===- SkeletonRegisterInfo.h - Skeleton Register Info Impl ------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -24,11 +24,13 @@ namespace llvm {
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned SrcReg, int FrameIndex) const;
unsigned SrcReg, int FrameIndex,
const TargetRegisterClass *RC) const;
void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIndex) const;
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,