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DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion

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rdar://12838504


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169951 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Manman Ren
2012-12-12 01:13:50 +00:00
parent 5da804150d
commit 981b96376a
2 changed files with 20 additions and 2 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -7433,7 +7433,8 @@ SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) {
// start at the previous one.
if (ShAmt % NewBW)
ShAmt = (((ShAmt + NewBW - 1) / NewBW) * NewBW) - NewBW;
APInt Mask = APInt::getBitsSet(BitWidth, ShAmt, ShAmt + NewBW);
APInt Mask = APInt::getBitsSet(BitWidth, ShAmt,
std::min(BitWidth, ShAmt + NewBW));
if ((Imm & Mask) == Imm) {
APInt NewImm = (Imm & Mask).lshr(ShAmt).trunc(NewBW);
if (Opc == ISD::AND)