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ARM parsing aliases for VLD1 single register all lanes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-11-30 01:09:44 +00:00
parent 3d925d24e8
commit 98b05a57b6
6 changed files with 142 additions and 6 deletions
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utils/TableGen/EDEmitter.cpp
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@@ -576,6 +576,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
REG("VecListThreeD");
REG("VecListFourD");
REG("VecListTwoQ");
REG("VecListOneDAllLanes");
IMM("i32imm");
IMM("i32imm_hilo16");