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Constify subtarget info properly so that we dont cast away the const in

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the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163251 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Roman Divacky 2012-09-05 21:43:57 +00:00
parent b438615abd
commit 98eb98b0f2
5 changed files with 11 additions and 11 deletions
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2
include/llvm/MC/MCSubtargetInfo.h
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@ -72,7 +72,7 @@ public:
/// getSchedModelForCPU - Get the machine model of a CPU. /// getSchedModelForCPU - Get the machine model of a CPU.
/// ///
MCSchedModel *getSchedModelForCPU(StringRef CPU) const; const MCSchedModel *getSchedModelForCPU(StringRef CPU) const;
/// getInstrItineraryForCPU - Get scheduling itinerary of a CPU. /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
/// ///

6
include/llvm/MC/SubtargetFeature.h
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@ -50,7 +50,7 @@ struct SubtargetFeatureKV {
// //
struct SubtargetInfoKV { struct SubtargetInfoKV {
const char *Key; // K-V key string const char *Key; // K-V key string
void *Value; // K-V pointer value const void *Value; // K-V pointer value
// Compare routine for std binary search // Compare routine for std binary search
bool operator<(const SubtargetInfoKV &S) const { bool operator<(const SubtargetInfoKV &S) const {
@ -96,8 +96,8 @@ public:
size_t FeatureTableSize); size_t FeatureTableSize);
/// Get scheduling itinerary of a CPU. /// Get scheduling itinerary of a CPU.
void *getItinerary(const StringRef CPU, const void *getItinerary(const StringRef CPU,
const SubtargetInfoKV *Table, size_t TableSize); const SubtargetInfoKV *Table, size_t TableSize);
/// Print feature string. /// Print feature string.
void print(raw_ostream &OS) const; void print(raw_ostream &OS) const;

6
lib/MC/MCSubtargetInfo.cpp
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@ -70,7 +70,7 @@ uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
} }
MCSchedModel * const MCSchedModel *
MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
assert(ProcSchedModel && "Processor machine model not available!"); assert(ProcSchedModel && "Processor machine model not available!");
@ -93,11 +93,11 @@ MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
return &MCSchedModel::DefaultSchedModel; return &MCSchedModel::DefaultSchedModel;
} }
assert(Found->Value && "Missing processor SchedModel value"); assert(Found->Value && "Missing processor SchedModel value");
return (MCSchedModel *)Found->Value; return (const MCSchedModel *)Found->Value;
} }
InstrItineraryData InstrItineraryData
MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
MCSchedModel *SchedModel = getSchedModelForCPU(CPU); const MCSchedModel *SchedModel = getSchedModelForCPU(CPU);
return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
} }

6
lib/MC/SubtargetFeature.cpp
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@ -337,9 +337,9 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU,
} }
/// Get scheduling itinerary of a CPU. /// Get scheduling itinerary of a CPU.
void *SubtargetFeatures::getItinerary(const StringRef CPU, const void *SubtargetFeatures::getItinerary(const StringRef CPU,
const SubtargetInfoKV *Table, const SubtargetInfoKV *Table,
size_t TableSize) { size_t TableSize) {
assert(Table && "missing table"); assert(Table && "missing table");
#ifndef NDEBUG #ifndef NDEBUG
for (size_t i = 1; i < TableSize; i++) { for (size_t i = 1; i < TableSize; i++) {

2
utils/TableGen/SubtargetEmitter.cpp
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@ -626,7 +626,7 @@ void SubtargetEmitter::EmitProcessorLookup(raw_ostream &OS) {
// Emit as { "cpu", procinit }, // Emit as { "cpu", procinit },
OS << " { " OS << " { "
<< "\"" << Name << "\", " << "\"" << Name << "\", "
<< "(void *)&" << ProcModelName; << "(const void *)&" << ProcModelName;
OS << " }"; OS << " }";