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<rdar://problem/7453528>. Track only physical registers that are valid for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90970 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -38,16 +38,19 @@ DebugMod("agg-antidep-debugmod",
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cl::desc("Debug control for aggressive anti-dep breaker"),
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cl::init(0), cl::Hidden);
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AggressiveAntiDepState::AggressiveAntiDepState(MachineBasicBlock *BB) :
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GroupNodes(TargetRegisterInfo::FirstVirtualRegister, 0) {
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// Initialize all registers to be in their own group. Initially we
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// assign the register to the same-indexed GroupNode.
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for (unsigned i = 0; i < TargetRegisterInfo::FirstVirtualRegister; ++i)
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GroupNodeIndices[i] = i;
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AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs,
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MachineBasicBlock *BB) :
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NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0) {
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// Initialize the indices to indicate that no registers are live.
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std::fill(KillIndices, array_endof(KillIndices), ~0u);
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std::fill(DefIndices, array_endof(DefIndices), BB->size());
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const unsigned BBSize = BB->size();
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for (unsigned i = 0; i < NumTargetRegs; ++i) {
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// Initialize all registers to be in their own group. Initially we
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// assign the register to the same-indexed GroupNode.
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GroupNodeIndices[i] = i;
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// Initialize the indices to indicate that no registers are live.
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KillIndices[i] = ~0u;
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DefIndices[i] = BBSize;
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}
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}
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unsigned AggressiveAntiDepState::GetGroup(unsigned Reg)
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@ -64,7 +67,7 @@ void AggressiveAntiDepState::GetGroupRegs(
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std::vector<unsigned> &Regs,
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std::multimap<unsigned, AggressiveAntiDepState::RegisterReference> *RegRefs)
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{
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for (unsigned Reg = 0; Reg != TargetRegisterInfo::FirstVirtualRegister; ++Reg) {
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for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) {
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if ((GetGroup(Reg) == Group) && (RegRefs->count(Reg) > 0))
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Regs.push_back(Reg);
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}
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@ -137,7 +140,7 @@ AggressiveAntiDepBreaker::~AggressiveAntiDepBreaker() {
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void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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assert(State == NULL);
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State = new AggressiveAntiDepState(BB);
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State = new AggressiveAntiDepState(TRI->getNumRegs(), BB);
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bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn());
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unsigned *KillIndices = State->GetKillIndices();
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@ -220,7 +223,7 @@ void AggressiveAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
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DEBUG(errs() << "\tRegs:");
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unsigned *DefIndices = State->GetDefIndices();
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for (unsigned Reg = 0; Reg != TargetRegisterInfo::FirstVirtualRegister; ++Reg) {
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for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) {
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// If Reg is current live, then mark that it can't be renamed as
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// we don't know the extent of its live-range anymore (now that it
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// has been scheduled). If it is not live but was defined in the
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@ -44,6 +44,10 @@ namespace llvm {
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} RegisterReference;
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private:
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/// NumTargetRegs - Number of non-virtual target registers
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/// (i.e. TRI->getNumRegs()).
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const unsigned NumTargetRegs;
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/// GroupNodes - Implements a disjoint-union data structure to
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/// form register groups. A node is represented by an index into
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/// the vector. A node can "point to" itself to indicate that it
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@ -69,7 +73,7 @@ namespace llvm {
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unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister];
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public:
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AggressiveAntiDepState(MachineBasicBlock *BB);
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AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB);
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/// GetKillIndices - Return the kill indices.
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unsigned *GetKillIndices() { return KillIndices; }
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@ -43,8 +43,11 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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static_cast<const TargetRegisterClass *>(0));
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// Initialize the indices to indicate that no registers are live.
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std::fill(KillIndices, array_endof(KillIndices), ~0u);
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std::fill(DefIndices, array_endof(DefIndices), BB->size());
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const unsigned BBSize = BB->size();
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for (unsigned i = 0; i < TRI->getNumRegs(); ++i) {
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KillIndices[i] = ~0u;
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DefIndices[i] = BBSize;
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}
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// Clear "do not change" set.
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KeepRegs.clear();
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@ -122,7 +125,7 @@ void CriticalAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
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// may have been rescheduled and its lifetime may overlap with registers
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// in ways not reflected in our current liveness state. For each such
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// register, adjust the liveness state to be conservatively correct.
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for (unsigned Reg = 0; Reg != TargetRegisterInfo::FirstVirtualRegister; ++Reg)
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for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg)
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if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) {
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assert(KillIndices[Reg] == ~0u && "Clobbered register is live!");
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// Mark this register to be non-renamable.
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@ -373,7 +373,8 @@ void SchedulePostRATDList::FinishBlock() {
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///
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void SchedulePostRATDList::StartBlockForKills(MachineBasicBlock *BB) {
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// Initialize the indices to indicate that no registers are live.
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std::fill(KillIndices, array_endof(KillIndices), ~0u);
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for (unsigned i = 0; i < TRI->getNumRegs(); ++i)
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KillIndices[i] = ~0u;
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// Determine the live-out physregs for this block.
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if (!BB->empty() && BB->back().getDesc().isReturn()) {
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