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Fix predicate and add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111981 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -418,7 +418,8 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
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// offset instead of 0 and do all sorts of operand munging.
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unsigned ResultReg = createResultReg(FixedRC);
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// TODO: Fix the Addressing modes so that these can share some code.
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if (AFI->isThumb2Function())
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// Since this is a Thumb1 load this will work in Thumb1 or 2 mode.
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if (AFI->isThumbFunction())
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(ARM::tLDR), ResultReg)
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.addReg(Reg).addImm(0).addReg(0));
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