From 993c897390f1fc4ac9032a4d0897f73b2497ded1 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 18 Apr 2006 16:44:51 +0000 Subject: [PATCH] Teach the codegen about instructions used for SSE spill code, allowing it to optimize cases where it has to spill a lot git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27801 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 5c4ab1bdf36..31a4f6fe2e7 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -56,6 +56,8 @@ unsigned X86InstrInfo::isLoadFromStackSlot(MachineInstr *MI, case X86::FpLD64m: case X86::MOVSSrm: case X86::MOVSDrm: + case X86::MOVAPSrm: + case X86::MOVAPDrm: if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() && MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() && MI->getOperand(2).getImmedValue() == 1 && @@ -79,6 +81,8 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI, case X86::FpSTP64m: case X86::MOVSSmr: case X86::MOVSDmr: + case X86::MOVAPSmr: + case X86::MOVAPDmr: if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() && MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() && MI->getOperand(1).getImmedValue() == 1 &&