mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-04 10:30:01 +00:00
[ARM] Add Thumb-2 code size optimization regression test for LSL (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217579 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
98ff94a759
commit
993f84c9bc
@ -55,3 +55,12 @@ entry:
|
||||
%shl = shl i32 %a, 13
|
||||
ret i32 %shl
|
||||
}
|
||||
|
||||
define i32 @lsl-reg(i32 %a, i32 %b) nounwind readnone {
|
||||
; CHECK-LABEL: "lsl-reg":
|
||||
; CHECK: lsl.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
|
||||
; CHECK-OPT: lsls r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
|
||||
entry:
|
||||
%shl = shl i32 %a, %b
|
||||
ret i32 %shl
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user