From 9955cb931b287bec91313a4b185fa965fb71f559 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 26 Jul 2013 19:01:56 +0000 Subject: [PATCH] [mips] Fix floating point branch, comparison, and conditional move instructions to have register FCC0 (the first floating point condition code register) in their Uses/Defs list. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187233 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsCondMov.td | 4 ++-- lib/Target/Mips/MipsInstrFPU.td | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/Mips/MipsCondMov.td b/lib/Target/Mips/MipsCondMov.td index cb0112afb74..8f5c4dcb445 100644 --- a/lib/Target/Mips/MipsCondMov.td +++ b/lib/Target/Mips/MipsCondMov.td @@ -37,7 +37,7 @@ class CMov_F_I_FT { - let Uses = [FCR31]; + let Uses = [FCC0]; let Constraints = "$F = $rd"; } @@ -47,7 +47,7 @@ class CMov_F_F_FT { - let Uses = [FCR31]; + let Uses = [FCC0]; let Constraints = "$F = $fd"; } diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index fc7ea301816..6fe469acc70 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -194,7 +194,7 @@ class BC1F_FT { - let Defs = [FCR31]; + let Defs = [FCC0]; let isCodeGenOnly = 1; }