6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-18 12:29:21 +00:00
Code Issues Projects Releases Wiki Activity

Compile CodeGen/X86/lea-3.ll:test2 to:

Browse Source 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-03-28 18:12:31 +00:00
parent 57b82b7845
commit 995f55036f
1 changed files with 13 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
lib/Target/X86/X86InstrInfo.cpp
View File

@ -149,6 +149,19 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M);
break;
}
case X86::SHL64ri: {
assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
// NOTE: LEA doesn't produce flags like shift does, but LLVM never uses
// the flags produced by a shift yet, so this is safe.
unsigned Dest = MI->getOperand(0).getReg();
unsigned Src = MI->getOperand(1).getReg();
unsigned ShAmt = MI->getOperand(2).getImm();
if (ShAmt == 0 || ShAmt >= 4) return 0;
NewMI = BuildMI(get(X86::LEA64r), Dest)
.addReg(0).addImm(1 << ShAmt).addReg(Src).addImm(0);
break;
}
case X86::SHL32ri: {
assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
// NOTE: LEA doesn't produce flags like shift does, but LLVM never uses