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Add AVX512 masked leadz instrinsic support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210652 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -4354,6 +4354,28 @@ def : Pat<(int_x86_avx512_mask_conflict_q_512 VR512:$src2, VR512:$src1,
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(VPCONFLICTQrrk VR512:$src1,
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(v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)), VR512:$src2)>;
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let Predicates = [HasCDI] in {
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defm VPLZCNTD : avx512_conflict<0x44, "vplzcntd", VR512, VK16WM,
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i512mem, i32mem, "{1to16}">,
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EVEX_V512, EVEX_CD8<32, CD8VF>;
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defm VPLZCNTQ : avx512_conflict<0x44, "vplzcntq", VR512, VK8WM,
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i512mem, i64mem, "{1to8}">,
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EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
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}
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def : Pat<(int_x86_avx512_mask_lzcnt_d_512 VR512:$src2, VR512:$src1,
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GR16:$mask),
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(VPLZCNTDrrk VR512:$src1,
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(v16i1 (COPY_TO_REGCLASS GR16:$mask, VK16WM)), VR512:$src2)>;
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def : Pat<(int_x86_avx512_mask_lzcnt_q_512 VR512:$src2, VR512:$src1,
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GR8:$mask),
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(VPLZCNTQrrk VR512:$src1,
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(v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)), VR512:$src2)>;
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def : Pat<(store (i1 -1), addr:$dst), (MOV8mi addr:$dst, (i8 1))>;
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def : Pat<(store (i1 1), addr:$dst), (MOV8mi addr:$dst, (i8 1))>;
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def : Pat<(store (i1 0), addr:$dst), (MOV8mi addr:$dst, (i8 0))>;
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