mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 05:29:24 +00:00
disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
13269335a5
commit
99a6cb92d1
@ -811,11 +811,15 @@ namespace ISD {
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class SDValue {
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public:
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SDNode *Val; // The node defining the value we are using.
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private:
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unsigned ResNo; // Which return value of the node we are using.
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public:
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SDValue() : Val(0), ResNo(0) {}
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SDValue(SDNode *val, unsigned resno) : Val(val), ResNo(resno) {}
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/// get the index which selects a specific result in the SDNode
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unsigned getResNo() const { return ResNo; }
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bool operator==(const SDValue &O) const {
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return Val == O.Val && ResNo == O.ResNo;
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}
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@ -882,7 +886,7 @@ template<> struct DenseMapInfo<SDValue> {
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}
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static unsigned getHashValue(const SDValue &Val) {
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return ((unsigned)((uintptr_t)Val.Val >> 4) ^
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(unsigned)((uintptr_t)Val.Val >> 9)) + Val.ResNo;
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(unsigned)((uintptr_t)Val.Val >> 9)) + Val.getResNo();
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}
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static bool isEqual(const SDValue &LHS, const SDValue &RHS) {
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return LHS == RHS;
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@ -2730,7 +2730,7 @@ static bool ExtendUsesToFormExtLoad(SDNode *N, SDValue N0,
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SDNode *User = *UI;
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for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
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SDValue UseOp = User->getOperand(i);
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if (UseOp.Val == N && UseOp.ResNo == 0) {
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if (UseOp.Val == N && UseOp.getResNo() == 0) {
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BothLiveOut = true;
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break;
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}
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@ -3366,7 +3366,7 @@ static SDNode *getBuildPairElt(SDNode *N, unsigned i) {
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SDValue Elt = N->getOperand(i);
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if (Elt.getOpcode() != ISD::MERGE_VALUES)
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return Elt.Val;
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return Elt.getOperand(Elt.ResNo).Val;
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return Elt.getOperand(Elt.getResNo()).Val;
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}
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/// CombineConsecutiveLoads - build_pair (load, load) -> load
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@ -821,7 +821,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
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AddLegalizedOperand(Op.getValue(i), Result.getValue(i));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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// Otherwise this is an unhandled builtin node. splat.
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#ifndef NDEBUG
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@ -901,7 +901,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Tmp2 = LegalizeOp(Result.getValue(1));
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AddLegalizedOperand(Op.getValue(0), Tmp1);
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AddLegalizedOperand(Op.getValue(1), Tmp2);
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return Op.ResNo ? Tmp2 : Tmp1;
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return Op.getResNo() ? Tmp2 : Tmp1;
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case ISD::EHSELECTION: {
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Tmp1 = LegalizeOp(Node->getOperand(0));
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Tmp2 = LegalizeOp(Node->getOperand(1));
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@ -935,7 +935,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Tmp2 = LegalizeOp(Result.getValue(1));
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AddLegalizedOperand(Op.getValue(0), Tmp1);
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AddLegalizedOperand(Op.getValue(1), Tmp2);
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return Op.ResNo ? Tmp2 : Tmp1;
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return Op.getResNo() ? Tmp2 : Tmp1;
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case ISD::EH_RETURN: {
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MVT VT = Node->getValueType(0);
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// The only "good" option for this node is to custom lower it.
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@ -959,7 +959,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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break;
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case ISD::MERGE_VALUES:
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// Legalize eliminates MERGE_VALUES nodes.
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Result = Node->getOperand(Op.ResNo);
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Result = Node->getOperand(Op.getResNo());
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break;
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case ISD::CopyFromReg:
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Tmp1 = LegalizeOp(Node->getOperand(0));
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@ -980,7 +980,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(Op.getValue(0), Result);
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AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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case ISD::UNDEF: {
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MVT VT = Op.getValueType();
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switch (TLI.getOperationAction(ISD::UNDEF, VT)) {
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@ -1025,7 +1025,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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case ISD::DBG_STOPPOINT:
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@ -1199,7 +1199,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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}
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AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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case ISD::ATOMIC_LOAD_ADD:
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case ISD::ATOMIC_LOAD_SUB:
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@ -1232,7 +1232,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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}
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AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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case ISD::Constant: {
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ConstantSDNode *CN = cast<ConstantSDNode>(Node);
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@ -1331,7 +1331,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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if (Tmp3.Val->getValueType(i) == MVT::Flag)
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continue;
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Tmp1 = LegalizeOp(Tmp3.getValue(i));
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if (Op.ResNo == i)
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if (Op.getResNo() == i)
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Tmp2 = Tmp1;
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AddLegalizedOperand(SDValue(Node, i), Tmp1);
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}
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@ -1625,7 +1625,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
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if (Node->getNumValues() == 2)
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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case ISD::DYNAMIC_STACKALLOC: {
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MVT VT = Node->getValueType(0);
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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@ -1684,7 +1684,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Tmp1);
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AddLegalizedOperand(SDValue(Node, 1), Tmp2);
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return Op.ResNo ? Tmp2 : Tmp1;
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return Op.getResNo() ? Tmp2 : Tmp1;
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}
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case ISD::INLINEASM: {
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SmallVector<SDValue, 8> Ops(Node->op_begin(), Node->op_end());
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@ -1720,7 +1720,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// INLINE asm returns a chain and flag, make sure to add both to the map.
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AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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case ISD::BR:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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@ -1935,7 +1935,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Tmp3);
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AddLegalizedOperand(SDValue(Node, 1), Tmp4);
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return Op.ResNo ? Tmp4 : Tmp3;
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return Op.getResNo() ? Tmp4 : Tmp3;
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} else {
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MVT SrcVT = LD->getMemoryVT();
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unsigned SrcWidth = SrcVT.getSizeInBits();
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@ -2124,7 +2124,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// both of them.
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AddLegalizedOperand(SDValue(Node, 0), Tmp1);
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AddLegalizedOperand(SDValue(Node, 1), Tmp2);
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return Op.ResNo ? Tmp2 : Tmp1;
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return Op.getResNo() ? Tmp2 : Tmp1;
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}
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}
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case ISD::EXTRACT_ELEMENT: {
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@ -2215,7 +2215,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Result = LegalizeOp(Result);
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} else {
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SDNode *InVal = Tmp2.Val;
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int InIx = Tmp2.ResNo;
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int InIx = Tmp2.getResNo();
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unsigned NumElems = InVal->getValueType(InIx).getVectorNumElements();
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MVT EVT = InVal->getValueType(InIx).getVectorElementType();
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@ -2411,7 +2411,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// in the high half of the vector.
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if (ST->getValue().getValueType().isVector()) {
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SDNode *InVal = ST->getValue().Val;
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int InIx = ST->getValue().ResNo;
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int InIx = ST->getValue().getResNo();
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MVT InVT = InVal->getValueType(InIx);
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unsigned NumElems = InVT.getVectorNumElements();
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MVT EVT = InVT.getVectorElementType();
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@ -2619,7 +2619,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Tmp1);
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AddLegalizedOperand(SDValue(Node, 1), Tmp2);
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return Op.ResNo ? Tmp2 : Tmp1;
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return Op.getResNo() ? Tmp2 : Tmp1;
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case ISD::STACKRESTORE:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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@ -2875,7 +2875,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
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Tmp2 = LegalizeOp(Tmp1.getValue(i));
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AddLegalizedOperand(SDValue(Node, i), Tmp2);
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if (i == Op.ResNo)
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if (i == Op.getResNo())
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RetVal = Tmp2;
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}
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assert(RetVal.Val && "Illegal result number");
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@ -2888,7 +2888,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized all of them.
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for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
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AddLegalizedOperand(SDValue(Node, i), Result.getValue(i));
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return Result.getValue(Op.ResNo);
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return Result.getValue(Op.getResNo());
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}
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// Binary operators
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@ -3278,7 +3278,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Result);
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AddLegalizedOperand(SDValue(Node, 1), Tmp1);
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return Op.ResNo ? Tmp1 : Result;
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return Op.getResNo() ? Tmp1 : Result;
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}
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case ISD::VACOPY:
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@ -3574,7 +3574,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// The input has to be a vector type, we have to either scalarize it, pack
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// it, or convert it based on whether the input vector type is legal.
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SDNode *InVal = Node->getOperand(0).Val;
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int InIx = Node->getOperand(0).ResNo;
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int InIx = Node->getOperand(0).getResNo();
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unsigned NumElems = InVal->getValueType(InIx).getVectorNumElements();
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MVT EVT = InVal->getValueType(InIx).getVectorElementType();
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@ -3876,7 +3876,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Result = LegalizeOp(Result);
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AddLegalizedOperand(SDValue(Node, 0), Result);
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AddLegalizedOperand(SDValue(Node, 1), Tmp1);
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return Op.ResNo ? Tmp1 : Result;
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return Op.getResNo() ? Tmp1 : Result;
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}
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case ISD::FLT_ROUNDS_: {
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MVT VT = Node->getValueType(0);
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@ -5808,7 +5808,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){
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break;
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}
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// FIXME: For now only expand i64,chain = MERGE_VALUES (x, y)
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assert(Op.ResNo == 0 && Node->getNumValues() == 2 &&
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assert(Op.getResNo() == 0 && Node->getNumValues() == 2 &&
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Op.getValue(1).getValueType() == MVT::Other &&
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"unhandled MERGE_VALUES");
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ExpandOp(Op.getOperand(0), Lo, Hi);
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@ -62,7 +62,7 @@ static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
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if (TargetRegisterInfo::isVirtualRegister(Reg))
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return;
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unsigned ResNo = User->getOperand(2).ResNo;
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unsigned ResNo = User->getOperand(2).getResNo();
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if (Def->isMachineOpcode()) {
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const TargetInstrDesc &II = TII->get(Def->getMachineOpcode());
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if (ResNo >= II.getNumDefs() &&
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@ -430,7 +430,7 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
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bool Match = true;
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if (User->getOpcode() == ISD::CopyToReg &&
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User->getOperand(2).Val == Node &&
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User->getOperand(2).ResNo == ResNo) {
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User->getOperand(2).getResNo() == ResNo) {
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unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
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if (TargetRegisterInfo::isVirtualRegister(DestReg)) {
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VRBase = DestReg;
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@ -440,9 +440,9 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
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} else {
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for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
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SDValue Op = User->getOperand(i);
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if (Op.Val != Node || Op.ResNo != ResNo)
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if (Op.Val != Node || Op.getResNo() != ResNo)
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continue;
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MVT VT = Node->getValueType(Op.ResNo);
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MVT VT = Node->getValueType(Op.getResNo());
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if (VT != MVT::Other && VT != MVT::Flag)
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Match = false;
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}
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@ -490,7 +490,7 @@ unsigned ScheduleDAG::getDstOfOnlyCopyToRegUse(SDNode *Node,
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SDNode *User = *Node->use_begin();
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if (User->getOpcode() == ISD::CopyToReg &&
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User->getOperand(2).Val == Node &&
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User->getOperand(2).ResNo == ResNo) {
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User->getOperand(2).getResNo() == ResNo) {
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unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
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if (TargetRegisterInfo::isVirtualRegister(Reg))
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return Reg;
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@ -514,7 +514,7 @@ void ScheduleDAG::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
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SDNode *User = *UI;
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if (User->getOpcode() == ISD::CopyToReg &&
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User->getOperand(2).Val == Node &&
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User->getOperand(2).ResNo == i) {
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User->getOperand(2).getResNo() == i) {
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unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
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if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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VRBase = Reg;
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@ -547,7 +547,7 @@ unsigned ScheduleDAG::getVR(SDValue Op,
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if (Op.isMachineOpcode() &&
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Op.getMachineOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
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// Add an IMPLICIT_DEF instruction before every use.
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unsigned VReg = getDstOfOnlyCopyToRegUse(Op.Val, Op.ResNo);
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unsigned VReg = getDstOfOnlyCopyToRegUse(Op.Val, Op.getResNo());
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// IMPLICIT_DEF can produce any type of result so its TargetInstrDesc
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// does not include operand register class info.
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if (!VReg) {
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@ -652,7 +652,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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}
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for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
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const SDValue &Op = N->getOperand(i);
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MVT VT = Op.Val->getValueType(Op.ResNo);
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MVT VT = Op.Val->getValueType(Op.getResNo());
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if (VT == MVT::Flag)
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return NULL;
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}
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@ -327,7 +327,7 @@ static void AddNodeIDOperands(FoldingSetNodeID &ID,
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const SDValue *Ops, unsigned NumOps) {
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for (; NumOps; --NumOps, ++Ops) {
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ID.AddPointer(Ops->Val);
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ID.AddInteger(Ops->ResNo);
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ID.AddInteger(Ops->getResNo());
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}
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}
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@ -337,7 +337,7 @@ static void AddNodeIDOperands(FoldingSetNodeID &ID,
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const SDUse *Ops, unsigned NumOps) {
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for (; NumOps; --NumOps, ++Ops) {
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ID.AddPointer(Ops->getVal());
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ID.AddInteger(Ops->getSDValue().ResNo);
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ID.AddInteger(Ops->getSDValue().getResNo());
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}
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}
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@ -3666,7 +3666,7 @@ SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
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// See if the modified node already exists.
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void *InsertPos = 0;
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if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
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return SDValue(Existing, InN.ResNo);
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return SDValue(Existing, InN.getResNo());
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// Nope it doesn't. Remove the node from its current place in the maps.
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if (InsertPos)
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@ -3695,7 +3695,7 @@ UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
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// See if the modified node already exists.
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void *InsertPos = 0;
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if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
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return SDValue(Existing, InN.ResNo);
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return SDValue(Existing, InN.getResNo());
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// Nope it doesn't. Remove the node from its current place in the maps.
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if (InsertPos)
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@ -3761,7 +3761,7 @@ UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
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// See if the modified node already exists.
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void *InsertPos = 0;
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if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
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return SDValue(Existing, InN.ResNo);
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return SDValue(Existing, InN.getResNo());
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|
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// Nope it doesn't. Remove the node from its current place in the maps.
|
||||
if (InsertPos)
|
||||
@ -4161,7 +4161,7 @@ SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
|
||||
void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
|
||||
DAGUpdateListener *UpdateListener) {
|
||||
SDNode *From = FromN.Val;
|
||||
assert(From->getNumValues() == 1 && FromN.ResNo == 0 &&
|
||||
assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
|
||||
"Cannot replace with this method!");
|
||||
assert(From != To.Val && "Cannot replace uses of with self");
|
||||
|
||||
@ -4267,7 +4267,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
|
||||
for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
|
||||
I != E; ++I, ++operandNum)
|
||||
if (I->getVal() == From) {
|
||||
const SDValue &ToOp = To[I->getSDValue().ResNo];
|
||||
const SDValue &ToOp = To[I->getSDValue().getResNo()];
|
||||
From->removeUser(operandNum, U);
|
||||
*I = ToOp;
|
||||
I->setUser(U);
|
||||
@ -4573,7 +4573,7 @@ bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
|
||||
|
||||
// TODO: Only iterate over uses of a given value of the node
|
||||
for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
|
||||
if (UI.getUse().getSDValue().ResNo == Value) {
|
||||
if (UI.getUse().getSDValue().getResNo() == Value) {
|
||||
if (NUses == 0)
|
||||
return false;
|
||||
--NUses;
|
||||
@ -4591,7 +4591,7 @@ bool SDNode::hasAnyUseOfValue(unsigned Value) const {
|
||||
assert(Value < getNumValues() && "Bad value!");
|
||||
|
||||
for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
|
||||
if (UI.getUse().getSDValue().ResNo == Value)
|
||||
if (UI.getUse().getSDValue().getResNo() == Value)
|
||||
return true;
|
||||
|
||||
return false;
|
||||
@ -5000,7 +5000,7 @@ void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
|
||||
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
|
||||
if (i) OS << ", ";
|
||||
OS << (void*)getOperand(i).Val;
|
||||
if (unsigned RN = getOperand(i).ResNo)
|
||||
if (unsigned RN = getOperand(i).getResNo())
|
||||
OS << ":" << RN;
|
||||
}
|
||||
|
||||
|
@ -1306,7 +1306,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
|
||||
else if (F->paramHasAttr(0, ParamAttr::ZExt))
|
||||
ExtendKind = ISD::ZERO_EXTEND;
|
||||
|
||||
getCopyToParts(DAG, SDValue(RetOp.Val, RetOp.ResNo + j),
|
||||
getCopyToParts(DAG, SDValue(RetOp.Val, RetOp.getResNo() + j),
|
||||
&Parts[0], NumParts, PartVT, ExtendKind);
|
||||
|
||||
for (unsigned i = 0; i < NumParts; ++i) {
|
||||
@ -2736,15 +2736,15 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) {
|
||||
// Copy the beginning value(s) from the original aggregate.
|
||||
for (; i != LinearIndex; ++i)
|
||||
Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
|
||||
SDValue(Agg.Val, Agg.ResNo + i);
|
||||
SDValue(Agg.Val, Agg.getResNo() + i);
|
||||
// Copy values from the inserted value(s).
|
||||
for (; i != LinearIndex + NumValValues; ++i)
|
||||
Values[i] = FromUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
|
||||
SDValue(Val.Val, Val.ResNo + i - LinearIndex);
|
||||
SDValue(Val.Val, Val.getResNo() + i - LinearIndex);
|
||||
// Copy remaining value(s) from the original aggregate.
|
||||
for (; i != NumAggValues; ++i)
|
||||
Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
|
||||
SDValue(Agg.Val, Agg.ResNo + i);
|
||||
SDValue(Agg.Val, Agg.getResNo() + i);
|
||||
|
||||
setValue(&I, DAG.getMergeValues(DAG.getVTList(&AggValueVTs[0], NumAggValues),
|
||||
&Values[0], NumAggValues));
|
||||
@ -2769,8 +2769,8 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
|
||||
// Copy out the selected value(s).
|
||||
for (unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++i)
|
||||
Values[i - LinearIndex] =
|
||||
OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.Val->getValueType(Agg.ResNo + i)) :
|
||||
SDValue(Agg.Val, Agg.ResNo + i);
|
||||
OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.Val->getValueType(Agg.getResNo() + i)) :
|
||||
SDValue(Agg.Val, Agg.getResNo() + i);
|
||||
|
||||
setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValValueVTs[0], NumValValues),
|
||||
&Values[0], NumValValues));
|
||||
@ -2965,7 +2965,7 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
|
||||
bool isVolatile = I.isVolatile();
|
||||
unsigned Alignment = I.getAlignment();
|
||||
for (unsigned i = 0; i != NumValues; ++i)
|
||||
Chains[i] = DAG.getStore(Root, SDValue(Src.Val, Src.ResNo + i),
|
||||
Chains[i] = DAG.getStore(Root, SDValue(Src.Val, Src.getResNo() + i),
|
||||
DAG.getNode(ISD::ADD, PtrVT, Ptr,
|
||||
DAG.getConstant(Offsets[i], PtrVT)),
|
||||
PtrV, Offsets[i],
|
||||
@ -3810,7 +3810,7 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
|
||||
unsigned NumParts = TLI->getNumRegisters(ValueVT);
|
||||
MVT RegisterVT = RegVTs[Value];
|
||||
|
||||
getCopyToParts(DAG, Val.getValue(Val.ResNo + Value),
|
||||
getCopyToParts(DAG, Val.getValue(Val.getResNo() + Value),
|
||||
&Parts[Part], NumParts, RegisterVT);
|
||||
Part += NumParts;
|
||||
}
|
||||
@ -4763,7 +4763,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
|
||||
Value != NumValues; ++Value) {
|
||||
MVT VT = ValueVTs[Value];
|
||||
const Type *ArgTy = VT.getTypeForMVT();
|
||||
SDValue Op = SDValue(Args[i].Node.Val, Args[i].Node.ResNo + Value);
|
||||
SDValue Op = SDValue(Args[i].Node.Val, Args[i].Node.getResNo() + Value);
|
||||
ISD::ArgFlagsTy Flags;
|
||||
unsigned OriginalAlignment =
|
||||
getTargetData()->getABITypeAlignment(ArgTy);
|
||||
@ -5017,8 +5017,8 @@ static bool IsPossiblyOverwrittenArgumentOfTailCall(SDValue Op,
|
||||
(Op.getOpcode() == ISD::LOAD &&
|
||||
IsFixedFrameObjectWithPosOffset(MFI, Op.getOperand(1))) ||
|
||||
(Op.getOpcode() == ISD::MERGE_VALUES &&
|
||||
Op.getOperand(Op.ResNo).getOpcode() == ISD::LOAD &&
|
||||
IsFixedFrameObjectWithPosOffset(MFI, Op.getOperand(Op.ResNo).
|
||||
Op.getOperand(Op.getResNo()).getOpcode() == ISD::LOAD &&
|
||||
IsFixedFrameObjectWithPosOffset(MFI, Op.getOperand(Op.getResNo()).
|
||||
getOperand(1))))
|
||||
return true;
|
||||
return false;
|
||||
|
@ -59,7 +59,7 @@ namespace llvm {
|
||||
static EdgeIter getEdgeTarget(const void *Node, EdgeIter I) {
|
||||
SDNode *TargetNode = *I;
|
||||
SDNodeIterator NI = SDNodeIterator::begin(TargetNode);
|
||||
std::advance(NI, I.getNode()->getOperand(I.getOperand()).ResNo);
|
||||
std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo());
|
||||
return NI;
|
||||
}
|
||||
|
||||
@ -110,7 +110,7 @@ namespace llvm {
|
||||
GraphWriter<SelectionDAG*> &GW) {
|
||||
GW.emitSimpleNode(0, "plaintext=circle", "GraphRoot");
|
||||
if (G->getRoot().Val)
|
||||
GW.emitEdge(0, -1, G->getRoot().Val, G->getRoot().ResNo,
|
||||
GW.emitEdge(0, -1, G->getRoot().Val, G->getRoot().getResNo(),
|
||||
"color=blue,style=dashed");
|
||||
}
|
||||
};
|
||||
|
@ -733,7 +733,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
|
||||
InFlag = SDValue(ResNode, 1);
|
||||
ReplaceUses(SDValue(Op.Val, 1), InFlag);
|
||||
}
|
||||
ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.ResNo));
|
||||
ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.getResNo()));
|
||||
return NULL;
|
||||
}
|
||||
case ARMISD::CMOV: {
|
||||
|
@ -646,7 +646,7 @@ SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
ResultVals.push_back(Chain);
|
||||
SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size());
|
||||
return Res.getValue(Op.ResNo);
|
||||
return Res.getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) {
|
||||
|
@ -1292,7 +1292,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
|
||||
// Otherwise, merge everything together with a MERGE_VALUES node.
|
||||
ResultVals[NumResults++] = Chain;
|
||||
SDValue Res = DAG.getMergeValues(ResultVals, NumResults);
|
||||
return Res.getValue(Op.ResNo);
|
||||
return Res.getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
static SDValue
|
||||
|
@ -750,7 +750,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
|
||||
|
||||
// Handle result values, copying them out of physregs into vregs that we
|
||||
// return.
|
||||
return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo);
|
||||
return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo());
|
||||
}
|
||||
|
||||
/// LowerCallResult - Lower the result values of an ISD::CALL into the
|
||||
@ -926,7 +926,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
|
||||
|
||||
// Return the new list of results.
|
||||
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
|
||||
ArgValues.size()).getValue(Op.ResNo);
|
||||
ArgValues.size()).getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
@ -544,7 +544,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
|
||||
ArgValues.push_back(Root);
|
||||
|
||||
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
|
||||
ArgValues.size()).getValue(Op.ResNo);
|
||||
ArgValues.size()).getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
|
||||
|
@ -2511,7 +2511,7 @@ SDValue PPCTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG,
|
||||
"Flag must be set. Depend on flag being set in LowerRET");
|
||||
Chain = DAG.getNode(PPCISD::TAILCALL,
|
||||
Op.Val->getVTList(), &Ops[0], Ops.size());
|
||||
return SDValue(Chain.Val, Op.ResNo);
|
||||
return SDValue(Chain.Val, Op.getResNo());
|
||||
}
|
||||
|
||||
Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size());
|
||||
@ -2548,7 +2548,7 @@ SDValue PPCTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG,
|
||||
ResultVals.push_back(Chain);
|
||||
SDValue Res = DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0],
|
||||
ResultVals.size());
|
||||
return Res.getValue(Op.ResNo);
|
||||
return Res.getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
SDValue PPCTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG,
|
||||
|
@ -253,7 +253,7 @@ static SDNode *findFlagUse(SDNode *N) {
|
||||
SDNode *User = *I;
|
||||
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
|
||||
SDValue Op = User->getOperand(i);
|
||||
if (Op.Val == N && Op.ResNo == FlagResNo)
|
||||
if (Op.Val == N && Op.getResNo() == FlagResNo)
|
||||
return User;
|
||||
}
|
||||
}
|
||||
@ -888,7 +888,7 @@ DOUT << "AlreadySelected " << AlreadySelected << "\n";
|
||||
case ISD::SMUL_LOHI:
|
||||
case ISD::UMUL_LOHI:
|
||||
// A mul_lohi where we need the low part can be folded as a plain multiply.
|
||||
if (N.ResNo != 0) break;
|
||||
if (N.getResNo() != 0) break;
|
||||
// FALL THROUGH
|
||||
case ISD::MUL:
|
||||
// X*[3,5,9] -> X+X*[2,4,8]
|
||||
|
@ -1396,7 +1396,7 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
// Return the new list of results.
|
||||
return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0],
|
||||
ArgValues.size()).getValue(Op.ResNo);
|
||||
ArgValues.size()).getValue(Op.getResNo());
|
||||
}
|
||||
|
||||
SDValue
|
||||
@ -1760,7 +1760,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
|
||||
Chain = DAG.getNode(X86ISD::TAILCALL,
|
||||
Op.Val->getVTList(), &Ops[0], Ops.size());
|
||||
|
||||
return SDValue(Chain.Val, Op.ResNo);
|
||||
return SDValue(Chain.Val, Op.getResNo());
|
||||
}
|
||||
|
||||
Chain = DAG.getNode(X86ISD::CALL, NodeTys, &Ops[0], Ops.size());
|
||||
@ -1787,7 +1787,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
// Handle result values, copying them out of physregs into vregs that we
|
||||
// return.
|
||||
return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo);
|
||||
return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo());
|
||||
}
|
||||
|
||||
|
||||
|
@ -1190,7 +1190,7 @@ public:
|
||||
ReplaceFroms.push_back("SDValue(N.Val, " +
|
||||
utostr(NumPatResults) + ")");
|
||||
ReplaceTos.push_back("SDValue(" + ChainName + ".Val, " +
|
||||
ChainName + ".ResNo" + ")");
|
||||
ChainName + ".getResNo()" + ")");
|
||||
ChainAssignmentNeeded |= NodeHasChain;
|
||||
}
|
||||
|
||||
@ -1203,7 +1203,7 @@ public:
|
||||
ReplaceFroms.push_back("SDValue(N.Val, " +
|
||||
utostr(NumPatResults+1) +
|
||||
")");
|
||||
ReplaceTos.push_back("SDValue(ResNode, N.ResNo-1)");
|
||||
ReplaceTos.push_back("SDValue(ResNode, N.getResNo()-1)");
|
||||
}
|
||||
ReplaceFroms.push_back("SDValue(N.Val, " +
|
||||
utostr(NumPatResults) + ")");
|
||||
|
Loading…
Reference in New Issue
Block a user