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ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109125 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -654,6 +654,19 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
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switch (Opcode) {
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default:
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llvm_unreachable("ARMCodeEmitter::emitPseudoInstruction");
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case ARM::BX:
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case ARM::BMOVPCRX:
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case ARM::BXr9:
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case ARM::BMOVPCRXr9: {
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// First emit mov lr, pc
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unsigned Binary = 0x01a0e00f;
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Binary |= II->getPredicate(&MI) << ARMII::CondShift;
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emitWordLE(Binary);
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// and then emit the branch.
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emitMiscBranchInstruction(MI);
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break;
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}
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case TargetOpcode::INLINEASM: {
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// We allow inline assembler nodes with empty bodies - they can
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// implicitly define registers, which is ok for JIT.
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@ -313,7 +313,7 @@ class ABXI<bits<4> opcod, dag oops, dag iops, InstrItinClass itin,
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}
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class ABXIx2<dag oops, dag iops, InstrItinClass itin,
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string asm, list<dag> pattern>
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: XI<oops, iops, AddrModeNone, Size8Bytes, IndexModeNone, BrMiscFrm, itin,
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: XI<oops, iops, AddrModeNone, Size8Bytes, IndexModeNone, Pseudo, itin,
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asm, "", pattern>;
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// BR_JT instructions
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