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Instead of adding an isSS field to LiveInterval to denote stack slot. Use top bit of 'reg' instead. If the top bit is set, than the LiveInterval represents a stack slot live interval.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-06-23 21:03:19 +00:00
parent 300c6c5167
commit 99ec779a93
3 changed files with 12 additions and 9 deletions
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12
include/llvm/CodeGen/LiveInterval.h
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@ -101,8 +101,8 @@ namespace llvm {
typedef SmallVector<LiveRange,4> Ranges;
typedef SmallVector<VNInfo*,4> VNInfoList;
bool isSS; // True if this represents a stack slot
unsigned reg; // the register or stack slot of this interval
// if the top bits is set, it represents a stack slot.
unsigned preference; // preferred register to allocate for this interval
float weight; // weight of this interval
Ranges ranges; // the ranges in which this register is live
@ -110,7 +110,9 @@ namespace llvm {
public:
LiveInterval(unsigned Reg, float Weight, bool IsSS = false)
: isSS(IsSS), reg(Reg), preference(0), weight(Weight) {
: reg(Reg), preference(0), weight(Weight) {
if (IsSS)
reg = reg | (1U << (sizeof(unsigned)*8-1));
}
typedef Ranges::iterator iterator;
@ -143,13 +145,15 @@ namespace llvm {
/// isStackSlot - Return true if this is a stack slot interval.
///
bool isStackSlot() const { return isSS; }
bool isStackSlot() const {
return reg & (1U << (sizeof(unsigned)*8-1));
}
/// getStackSlotIndex - Return stack slot index if this is a stack slot
/// interval.
int getStackSlotIndex() const {
assert(isStackSlot() && "Interval is not a stack slot interval!");
return reg;
return reg & ~(1U << (sizeof(unsigned)*8-1));
}
bool containsOneValue() const { return valnos.size() == 1; }

4
lib/CodeGen/LiveInterval.cpp
View File

@ -678,8 +678,8 @@ void LiveRange::dump() const {
void LiveInterval::print(std::ostream &OS,
const TargetRegisterInfo *TRI) const {
if (isSS)
OS << "SS#" << reg;
if (isStackSlot())
OS << "SS#" << getStackSlotIndex();
else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg))
OS << TRI->getName(reg);
else

5
lib/CodeGen/StackSlotColoring.cpp
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@ -1,4 +1,4 @@
//===-- StackSlotColoring.cpp - Sinking for machine instructions ----------===//
//===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
//
// The LLVM Compiler Infrastructure
//
@ -12,9 +12,9 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "stackcoloring"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
@ -201,7 +201,6 @@ int StackSlotColoring::ColorSlot(LiveInterval *li) {
bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
unsigned NumObjs = MFI->getObjectIndexEnd();
std::vector<int> SlotMapping(NumObjs, -1);
SlotMapping.resize(NumObjs, -1);
bool Changed = false;
for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {