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Mips32 does not reserve even-numbered floating point registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-09-09 21:31:46 +00:00
parent 9db817fd0c
commit 9a439affd7
1 changed files with 0 additions and 5 deletions
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5
lib/Target/Mips/MipsRegisterInfo.cpp
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@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const {
Reserved.set(Mips::F31);
Reserved.set(Mips::D15);
// SRV4 requires that odd register can't be used.
if (!Subtarget.isSingleFloat() && !Subtarget.isMips32())
for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2)
Reserved.set(FReg);
return Reserved;
}