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Mips32 does not reserve even-numbered floating point registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const {
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Reserved.set(Mips::F31);
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Reserved.set(Mips::D15);
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// SRV4 requires that odd register can't be used.
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if (!Subtarget.isSingleFloat() && !Subtarget.isMips32())
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for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2)
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Reserved.set(FReg);
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return Reserved;
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}
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