When assigning a physical register to a MachineOperand, set

the subreg field to 0, since the subreg field is only used
for virtual register subregs. This doesn't change
current functionality; it just eliminates bogus noise from
debug output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68955 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-04-13 15:21:32 +00:00
parent ee30047386
commit 9a77a92859

View File

@@ -104,6 +104,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
} }
MF.getRegInfo().setPhysRegUsed(RReg); MF.getRegInfo().setPhysRegUsed(RReg);
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
} else { } else {
MF.getRegInfo().setPhysRegUsed(MO.getReg()); MF.getRegInfo().setPhysRegUsed(MO.getReg());
} }
@@ -280,6 +281,7 @@ static void ReMaterialize(MachineBasicBlock &MBB,
assert(Phys); assert(Phys);
unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys; unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
MO.setReg(RReg); MO.setReg(RReg);
MO.setSubReg(0);
} }
++NumReMats; ++NumReMats;
} }
@@ -496,6 +498,7 @@ unsigned ReuseInfo::GetRegForReload(unsigned PhysReg, MachineInstr *MI,
unsigned SubIdx = MI->getOperand(NewOp.Operand).getSubReg(); unsigned SubIdx = MI->getOperand(NewOp.Operand).getSubReg();
unsigned RReg = SubIdx ? TRI->getSubReg(NewPhysReg, SubIdx) : NewPhysReg; unsigned RReg = SubIdx ? TRI->getSubReg(NewPhysReg, SubIdx) : NewPhysReg;
MI->getOperand(NewOp.Operand).setReg(RReg); MI->getOperand(NewOp.Operand).setReg(RReg);
MI->getOperand(NewOp.Operand).setSubReg(0);
Spills.addAvailable(NewOp.StackSlotOrReMat, NewPhysReg); Spills.addAvailable(NewOp.StackSlotOrReMat, NewPhysReg);
--MII; --MII;
@@ -1122,6 +1125,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
ReusedOperands.markClobbered(Phys); ReusedOperands.markClobbered(Phys);
unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys; unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
if (VRM.isImplicitlyDefined(VirtReg)) if (VRM.isImplicitlyDefined(VirtReg))
BuildMI(MBB, &MI, MI.getDebugLoc(), BuildMI(MBB, &MI, MI.getDebugLoc(),
TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg); TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg);
@@ -1185,6 +1189,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
<< TRI->getName(VRM.getPhys(VirtReg)) << "\n"; << TRI->getName(VRM.getPhys(VirtReg)) << "\n";
unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
// The only technical detail we have is that we don't know that // The only technical detail we have is that we don't know that
// PhysReg won't be clobbered by a reloaded stack slot that occurs // PhysReg won't be clobbered by a reloaded stack slot that occurs
@@ -1264,6 +1269,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
<< " instead of reloading into same physreg.\n"; << " instead of reloading into same physreg.\n";
unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
ReusedOperands.markClobbered(RReg); ReusedOperands.markClobbered(RReg);
++NumReused; ++NumReused;
continue; continue;
@@ -1284,6 +1290,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
unsigned RReg = unsigned RReg =
SubIdx ? TRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg; SubIdx ? TRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
DOUT << '\t' << *prior(MII); DOUT << '\t' << *prior(MII);
++NumReused; ++NumReused;
continue; continue;
@@ -1328,6 +1335,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
} }
unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
UpdateKills(*prior(MII), RegKills, KillOps, TRI); UpdateKills(*prior(MII), RegKills, KillOps, TRI);
DOUT << '\t' << *prior(MII); DOUT << '\t' << *prior(MII);
} }
@@ -1613,6 +1621,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
ReusedOperands.markClobbered(RReg); ReusedOperands.markClobbered(RReg);
MI.getOperand(i).setReg(RReg); MI.getOperand(i).setReg(RReg);
MI.getOperand(i).setSubReg(0);
if (!MO.isDead()) { if (!MO.isDead()) {
MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; MachineInstr *&LastStore = MaybeDeadStores[StackSlot];