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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-15 06:29:05 +00:00
When assigning a physical register to a MachineOperand, set
the subreg field to 0, since the subreg field is only used for virtual register subregs. This doesn't change current functionality; it just eliminates bogus noise from debug output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68955 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -104,6 +104,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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}
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}
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MF.getRegInfo().setPhysRegUsed(RReg);
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MF.getRegInfo().setPhysRegUsed(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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} else {
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} else {
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MF.getRegInfo().setPhysRegUsed(MO.getReg());
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MF.getRegInfo().setPhysRegUsed(MO.getReg());
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}
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}
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@@ -280,6 +281,7 @@ static void ReMaterialize(MachineBasicBlock &MBB,
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assert(Phys);
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assert(Phys);
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unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
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unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
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MO.setReg(RReg);
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MO.setReg(RReg);
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MO.setSubReg(0);
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}
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}
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++NumReMats;
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++NumReMats;
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}
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}
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@@ -496,6 +498,7 @@ unsigned ReuseInfo::GetRegForReload(unsigned PhysReg, MachineInstr *MI,
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unsigned SubIdx = MI->getOperand(NewOp.Operand).getSubReg();
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unsigned SubIdx = MI->getOperand(NewOp.Operand).getSubReg();
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unsigned RReg = SubIdx ? TRI->getSubReg(NewPhysReg, SubIdx) : NewPhysReg;
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unsigned RReg = SubIdx ? TRI->getSubReg(NewPhysReg, SubIdx) : NewPhysReg;
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MI->getOperand(NewOp.Operand).setReg(RReg);
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MI->getOperand(NewOp.Operand).setReg(RReg);
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MI->getOperand(NewOp.Operand).setSubReg(0);
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Spills.addAvailable(NewOp.StackSlotOrReMat, NewPhysReg);
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Spills.addAvailable(NewOp.StackSlotOrReMat, NewPhysReg);
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--MII;
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--MII;
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@@ -1122,6 +1125,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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ReusedOperands.markClobbered(Phys);
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ReusedOperands.markClobbered(Phys);
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unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
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unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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if (VRM.isImplicitlyDefined(VirtReg))
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if (VRM.isImplicitlyDefined(VirtReg))
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BuildMI(MBB, &MI, MI.getDebugLoc(),
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BuildMI(MBB, &MI, MI.getDebugLoc(),
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TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg);
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TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg);
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@@ -1185,6 +1189,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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<< TRI->getName(VRM.getPhys(VirtReg)) << "\n";
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<< TRI->getName(VRM.getPhys(VirtReg)) << "\n";
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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// The only technical detail we have is that we don't know that
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// The only technical detail we have is that we don't know that
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// PhysReg won't be clobbered by a reloaded stack slot that occurs
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// PhysReg won't be clobbered by a reloaded stack slot that occurs
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@@ -1264,6 +1269,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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<< " instead of reloading into same physreg.\n";
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<< " instead of reloading into same physreg.\n";
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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ReusedOperands.markClobbered(RReg);
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ReusedOperands.markClobbered(RReg);
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++NumReused;
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++NumReused;
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continue;
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continue;
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@@ -1284,6 +1290,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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unsigned RReg =
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unsigned RReg =
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SubIdx ? TRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
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SubIdx ? TRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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DOUT << '\t' << *prior(MII);
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DOUT << '\t' << *prior(MII);
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++NumReused;
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++NumReused;
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continue;
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continue;
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@@ -1328,6 +1335,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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}
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}
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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UpdateKills(*prior(MII), RegKills, KillOps, TRI);
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UpdateKills(*prior(MII), RegKills, KillOps, TRI);
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DOUT << '\t' << *prior(MII);
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DOUT << '\t' << *prior(MII);
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}
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}
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@@ -1613,6 +1621,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
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ReusedOperands.markClobbered(RReg);
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ReusedOperands.markClobbered(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setReg(RReg);
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MI.getOperand(i).setSubReg(0);
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if (!MO.isDead()) {
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if (!MO.isDead()) {
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MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
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MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
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