Have ARMSelectionDAGInfo take a DataLayout as it's argument as the

DAG has access to the subtarget and TargetSelectionDAGInfo only
needs a DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210859 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-06-12 23:39:49 +00:00
parent 4eddf94a14
commit 9a81e28056
3 changed files with 11 additions and 14 deletions

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@ -18,9 +18,8 @@ using namespace llvm;
#define DEBUG_TYPE "arm-selectiondag-info" #define DEBUG_TYPE "arm-selectiondag-info"
ARMSelectionDAGInfo::ARMSelectionDAGInfo(const TargetMachine &TM) ARMSelectionDAGInfo::ARMSelectionDAGInfo(const DataLayout &DL)
: TargetSelectionDAGInfo(TM.getDataLayout()), : TargetSelectionDAGInfo(&DL) {}
Subtarget(&TM.getSubtarget<ARMSubtarget>()) {}
ARMSelectionDAGInfo::~ARMSelectionDAGInfo() { ARMSelectionDAGInfo::~ARMSelectionDAGInfo() {
} }
@ -33,6 +32,7 @@ ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
bool isVolatile, bool AlwaysInline, bool isVolatile, bool AlwaysInline,
MachinePointerInfo DstPtrInfo, MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const { MachinePointerInfo SrcPtrInfo) const {
const ARMSubtarget &Subtarget = DAG.getTarget().getSubtarget<ARMSubtarget>();
// Do repeated 4-byte loads and stores. To be improved. // Do repeated 4-byte loads and stores. To be improved.
// This requires 4-byte alignment. // This requires 4-byte alignment.
if ((Align & 3) != 0) if ((Align & 3) != 0)
@ -43,7 +43,7 @@ ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
if (!ConstantSize) if (!ConstantSize)
return SDValue(); return SDValue();
uint64_t SizeVal = ConstantSize->getZExtValue(); uint64_t SizeVal = ConstantSize->getZExtValue();
if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold()) if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
return SDValue(); return SDValue();
unsigned BytesLeft = SizeVal & 3; unsigned BytesLeft = SizeVal & 3;
@ -53,7 +53,7 @@ ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
unsigned VTSize = 4; unsigned VTSize = 4;
unsigned i = 0; unsigned i = 0;
// Emit a maximum of 4 loads in Thumb1 since we have fewer registers // Emit a maximum of 4 loads in Thumb1 since we have fewer registers
const unsigned MAX_LOADS_IN_LDM = Subtarget->isThumb1Only() ? 4 : 6; const unsigned MAX_LOADS_IN_LDM = Subtarget.isThumb1Only() ? 4 : 6;
SDValue TFOps[6]; SDValue TFOps[6];
SDValue Loads[6]; SDValue Loads[6];
uint64_t SrcOff = 0, DstOff = 0; uint64_t SrcOff = 0, DstOff = 0;
@ -150,9 +150,10 @@ EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
SDValue Src, SDValue Size, SDValue Src, SDValue Size,
unsigned Align, bool isVolatile, unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo) const { MachinePointerInfo DstPtrInfo) const {
const ARMSubtarget &Subtarget = DAG.getTarget().getSubtarget<ARMSubtarget>();
// Use default for non-AAPCS (or MachO) subtargets // Use default for non-AAPCS (or MachO) subtargets
if (!Subtarget->isAAPCS_ABI() || Subtarget->isTargetMachO() || if (!Subtarget.isAAPCS_ABI() || Subtarget.isTargetMachO() ||
Subtarget->isTargetWindows()) Subtarget.isTargetWindows())
return SDValue(); return SDValue();
const ARMTargetLowering &TLI = const ARMTargetLowering &TLI =

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@ -36,12 +36,8 @@ namespace ARM_AM {
} // end namespace ARM_AM } // end namespace ARM_AM
class ARMSelectionDAGInfo : public TargetSelectionDAGInfo { class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
/// make the right decision when generating code for different targets.
const ARMSubtarget *Subtarget;
public: public:
explicit ARMSelectionDAGInfo(const TargetMachine &TM); explicit ARMSelectionDAGInfo(const DataLayout &DL);
~ARMSelectionDAGInfo(); ~ARMSelectionDAGInfo();
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,

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@ -139,7 +139,7 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,
InstrInfo(Subtarget), InstrInfo(Subtarget),
DL(computeDataLayout(Subtarget)), DL(computeDataLayout(Subtarget)),
TLInfo(*this), TLInfo(*this),
TSInfo(*this), TSInfo(DL),
FrameLowering(Subtarget) { FrameLowering(Subtarget) {
initAsmInfo(); initAsmInfo();
if (!Subtarget.hasARMOps()) if (!Subtarget.hasARMOps())
@ -179,7 +179,7 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,
: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
DL(computeDataLayout(Subtarget)), DL(computeDataLayout(Subtarget)),
TLInfo(*this), TLInfo(*this),
TSInfo(*this), TSInfo(DL),
FrameLowering(Subtarget.hasThumb2() FrameLowering(Subtarget.hasThumb2()
? new ARMFrameLowering(Subtarget) ? new ARMFrameLowering(Subtarget)
: (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)) { : (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)) {