mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
Some clean up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27715 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
b097aa9353
commit
9ab1ac5e99
@ -736,7 +736,7 @@ def FsANDNPDrm : PDI<0x55, MRMSrcMem, (ops FR64:$dst, FR64:$src1, f128mem:$src2)
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}
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//===----------------------------------------------------------------------===//
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// SSE packed Instructions
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// SSE packed FP Instructions
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//===----------------------------------------------------------------------===//
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// Some 'special' instructions
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@ -780,17 +780,6 @@ def MOVUPDrm : PDI<0x10, MRMSrcMem, (ops VR128:$dst, f128mem:$src),
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def MOVUPDmr : PDI<0x11, MRMDestMem, (ops f128mem:$dst, VR128:$src),
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"movupd {$src, $dst|$dst, $src}",
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[(int_x86_sse2_storeu_pd addr:$dst, VR128:$src)]>;
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def MOVDQUrm : I<0x6F, MRMSrcMem, (ops VR128:$dst, i128mem:$src),
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"movdqu {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_loadu_dq addr:$src))]>,
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XS, Requires<[HasSSE2]>;
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def MOVDQUmr : I<0x7F, MRMDestMem, (ops i128mem:$dst, VR128:$src),
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"movdqu {$src, $dst|$dst, $src}",
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[(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>,
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XS, Requires<[HasSSE2]>;
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def LDDQUrm : S3DI<0xF0, MRMSrcMem, (ops VR128:$dst, i128mem:$src),
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"lddqu {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>;
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let isTwoAddress = 1 in {
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def MOVLPSrm : PSI<0x12, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f64mem:$src2),
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@ -1226,68 +1215,6 @@ def CMPPDrm : PDIi8<0xC2, MRMSrcMem,
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"cmp${cc}pd {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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def PCMPEQBrr : PDI<0x74, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_b VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQBrm : PDI<0x74, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PCMPEQWrr : PDI<0x75, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_w VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQWrm : PDI<0x75, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PCMPEQDrr : PDI<0x76, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_d VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQDrm : PDI<0x76, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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def PCMPGTBrr : PDI<0x64, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_b VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTBrm : PDI<0x64, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PCMPGTWrr : PDI<0x65, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_w VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTWrm : PDI<0x65, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PCMPGTDrr : PDI<0x66, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_d VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTDrm : PDI<0x66, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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}
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// Shuffle and unpack instructions
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@ -1401,6 +1328,17 @@ def MOVDQArm : PDI<0x6F, MRMSrcMem, (ops VR128:$dst, i128mem:$src),
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def MOVDQAmr : PDI<0x7F, MRMDestMem, (ops i128mem:$dst, VR128:$src),
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"movdqa {$src, $dst|$dst, $src}",
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[(store (v2i64 VR128:$src), addr:$dst)]>;
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def MOVDQUrm : I<0x6F, MRMSrcMem, (ops VR128:$dst, i128mem:$src),
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"movdqu {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_loadu_dq addr:$src))]>,
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XS, Requires<[HasSSE2]>;
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def MOVDQUmr : I<0x7F, MRMDestMem, (ops i128mem:$dst, VR128:$src),
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"movdqu {$src, $dst|$dst, $src}",
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[(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>,
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XS, Requires<[HasSSE2]>;
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def LDDQUrm : S3DI<0xF0, MRMSrcMem, (ops VR128:$dst, i128mem:$src),
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"lddqu {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>;
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// 128-bit Integer Arithmetic
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let isTwoAddress = 1 in {
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@ -1800,6 +1738,71 @@ def PANDNrm : PDI<0xDF, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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(load addr:$src2))))]>;
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}
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// SSE2 Integer comparison
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let isTwoAddress = 1 in {
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def PCMPEQBrr : PDI<0x74, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_b VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQBrm : PDI<0x74, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PCMPEQWrr : PDI<0x75, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_w VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQWrm : PDI<0x75, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PCMPEQDrr : PDI<0x76, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpeqd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_d VR128:$src1,
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VR128:$src2))]>;
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def PCMPEQDrm : PDI<0x76, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpeqd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpeq_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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def PCMPGTBrr : PDI<0x64, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_b VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTBrm : PDI<0x64, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PCMPGTWrr : PDI<0x65, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_w VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTWrm : PDI<0x65, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PCMPGTDrr : PDI<0x66, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pcmpgtd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_d VR128:$src1,
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VR128:$src2))]>;
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def PCMPGTDrm : PDI<0x66, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pcmpgtd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pcmpgt_d VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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}
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// Pack instructions
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let isTwoAddress = 1 in {
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def PACKSSWBrr : PDI<0x63, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
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@ -1998,12 +2001,12 @@ def PUNPCKHQDQrm : PDI<0x6D, MRMSrcMem,
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}
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// Extract / Insert
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def PEXTRWr : PDIi8<0xC5, MRMSrcReg,
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def PEXTRWri : PDIi8<0xC5, MRMSrcReg,
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(ops R32:$dst, VR128:$src1, i32i8imm:$src2),
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"pextrw {$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set R32:$dst, (X86pextrw (v8i16 VR128:$src1),
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(i32 imm:$src2)))]>;
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def PEXTRWm : PDIi8<0xC5, MRMSrcMem,
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def PEXTRWmi : PDIi8<0xC5, MRMSrcMem,
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(ops R32:$dst, i128mem:$src1, i32i8imm:$src2),
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"pextrw {$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set R32:$dst, (X86pextrw
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@ -2011,12 +2014,12 @@ def PEXTRWm : PDIi8<0xC5, MRMSrcMem,
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(i32 imm:$src2)))]>;
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let isTwoAddress = 1 in {
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def PINSRWr : PDIi8<0xC4, MRMSrcReg,
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def PINSRWrri : PDIi8<0xC4, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, R32:$src2, i32i8imm:$src3),
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"pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst, (v8i16 (X86pinsrw (v8i16 VR128:$src1),
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R32:$src2, (i32 imm:$src3))))]>;
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def PINSRWm : PDIi8<0xC4, MRMSrcMem,
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def PINSRWrmi : PDIi8<0xC4, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, i16mem:$src2, i32i8imm:$src3),
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"pinsrw {$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst,
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