Moving register scavenging to a post pass results in virtual registers in

the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2009-09-29 17:24:37 +00:00
parent 8971c4a30e
commit 9ab2238df9

View File

@ -241,7 +241,8 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator MI,
// Remove any candidates touched by instruction.
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || MO.isUndef() || !MO.getReg())
if (!MO.isReg() || MO.isUndef() || !MO.getReg() ||
TRI->isVirtualRegister(MO.getReg()))
continue;
Candidates.reset(MO.getReg());
for (const unsigned *R = TRI->getAliasSet(MO.getReg()); *R; R++)
@ -279,7 +280,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
// Exclude all the registers being used by the instruction.
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
MachineOperand &MO = I->getOperand(i);
if (MO.isReg())
if (MO.isReg() && !TRI->isVirtualRegister(MO.getReg()))
Candidates.reset(MO.getReg());
}