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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Fix i128 div/mod on mingw64
The Win64 docs are very clear that anything larger than 8 bytes is passed by reference, and GCC MinGW64 honors that for __modti3 and friends. Patch by Jameson Nash! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208029 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1520,6 +1520,15 @@ void X86TargetLowering::resetOperationActions() {
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}
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}
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}
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}
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if (Subtarget->isTargetWin64()) {
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setOperationAction(ISD::SDIV, MVT::i128, Custom);
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setOperationAction(ISD::UDIV, MVT::i128, Custom);
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setOperationAction(ISD::SREM, MVT::i128, Custom);
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setOperationAction(ISD::UREM, MVT::i128, Custom);
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setOperationAction(ISD::SDIVREM, MVT::i128, Custom);
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setOperationAction(ISD::UDIVREM, MVT::i128, Custom);
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}
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// We have target-specific dag combine patterns for the following nodes:
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// We have target-specific dag combine patterns for the following nodes:
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setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
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setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
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setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
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setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
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@ -13182,6 +13191,58 @@ static SDValue LowerMUL(SDValue Op, const X86Subtarget *Subtarget,
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return DAG.getNode(ISD::ADD, dl, VT, Res, AhiBlo);
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return DAG.getNode(ISD::ADD, dl, VT, Res, AhiBlo);
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}
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}
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SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
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assert(Subtarget->isTargetWin64() && "Unexpected target");
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EVT VT = Op.getValueType();
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assert(VT.isInteger() && VT.getSizeInBits() == 128 &&
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"Unexpected return type for lowering");
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RTLIB::Libcall LC;
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bool isSigned;
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switch (Op->getOpcode()) {
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default: llvm_unreachable("Unexpected request for libcall!");
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case ISD::SDIV: isSigned = true; LC = RTLIB::SDIV_I128; break;
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case ISD::UDIV: isSigned = false; LC = RTLIB::UDIV_I128; break;
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case ISD::SREM: isSigned = true; LC = RTLIB::SREM_I128; break;
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case ISD::UREM: isSigned = false; LC = RTLIB::UREM_I128; break;
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case ISD::SDIVREM: isSigned = true; LC = RTLIB::SDIVREM_I128; break;
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case ISD::UDIVREM: isSigned = false; LC = RTLIB::UDIVREM_I128; break;
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}
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SDLoc dl(Op);
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SDValue InChain = DAG.getEntryNode();
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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for (unsigned i = 0, e = Op->getNumOperands(); i != e; ++i) {
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EVT ArgVT = Op->getOperand(i).getValueType();
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assert(ArgVT.isInteger() && ArgVT.getSizeInBits() == 128 &&
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"Unexpected argument type for lowering");
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SDValue StackPtr = DAG.CreateStackTemporary(ArgVT, 16);
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Entry.Node = StackPtr;
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InChain = DAG.getStore(InChain, dl, Op->getOperand(i), StackPtr, MachinePointerInfo(),
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false, false, 16);
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Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
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Entry.Ty = PointerType::get(ArgTy,0);
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Entry.isSExt = false;
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Entry.isZExt = false;
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Args.push_back(Entry);
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}
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SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC),
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getPointerTy());
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TargetLowering::CallLoweringInfo CLI(
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InChain, static_cast<EVT>(MVT::v2i64).getTypeForEVT(*DAG.getContext()),
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isSigned, !isSigned, false, true, 0, getLibcallCallingConv(LC),
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/*isTailCall=*/false,
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/*doesNotReturn=*/false, /*isReturnValueUsed=*/true, Callee, Args, DAG,
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dl);
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std::pair<SDValue, SDValue> CallInfo = LowerCallTo(CLI);
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return DAG.getNode(ISD::BITCAST, dl, VT, CallInfo.first);
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}
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static SDValue LowerMUL_LOHI(SDValue Op, const X86Subtarget *Subtarget,
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static SDValue LowerMUL_LOHI(SDValue Op, const X86Subtarget *Subtarget,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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SDValue Op0 = Op.getOperand(0), Op1 = Op.getOperand(1);
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SDValue Op0 = Op.getOperand(0), Op1 = Op.getOperand(1);
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@ -14302,6 +14363,16 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
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case ISD::SUBE:
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case ISD::SUBE:
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// We don't want to expand or promote these.
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// We don't want to expand or promote these.
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return;
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return;
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case ISD::SDIV:
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case ISD::UDIV:
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case ISD::SREM:
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case ISD::UREM:
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case ISD::SDIVREM:
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case ISD::UDIVREM: {
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SDValue V = LowerWin64_i128OP(SDValue(N,0), DAG);
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Results.push_back(V);
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return;
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}
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_UINT: {
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case ISD::FP_TO_UINT: {
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bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT;
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bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT;
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@ -921,6 +921,7 @@ namespace llvm {
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SDValue LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const;
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SDValue
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SDValue
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LowerFormalArguments(SDValue Chain,
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LowerFormalArguments(SDValue Chain,
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26
test/CodeGen/X86/mod128.ll
Normal file
26
test/CodeGen/X86/mod128.ll
Normal file
@ -0,0 +1,26 @@
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
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; RUN: llc < %s -mtriple=x86_64-cygwin | FileCheck %s -check-prefix=WIN64
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; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
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; RUN: llc < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
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define i64 @mod128(i128 %x) {
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; X86-64: movl $3, %edx
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; X86-64: xorl %ecx, %ecx
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; X86-64: callq __modti3
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; X86-64-NOT: movd %xmm0, %rax
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; WIN64-NOT: movl $3, %r8d
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; WIN64-NOT: xorl %r9d, %r9d
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; WIN64-DAG: movq %rdx, 56(%rsp)
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; WIN64-DAG: movq %rcx, 48(%rsp)
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; WIN64-DAG: leaq 48(%rsp), %rcx
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; WIN64-DAG: leaq 32(%rsp), %rdx
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; WIN64-DAG: movq $0, 40(%rsp)
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; WIN64-DAG: movq $3, 32(%rsp)
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; WIN64: callq __modti3
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; WIN64: movd %xmm0, %rax
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%1 = srem i128 %x, 3
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%2 = trunc i128 %1 to i64
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ret i64 %2
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}
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