Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that

need to be declared as such.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4975 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2002-12-12 23:19:51 +00:00
parent 9f32791fe7
commit 9ada014ec0
2 changed files with 10 additions and 2 deletions

View File

@ -54,7 +54,8 @@ const unsigned M_PREFETCH_FLAG = 1 << 11;
const unsigned M_STORE_FLAG = 1 << 12;
const unsigned M_DUMMY_PHI_FLAG = 1 << 13;
const unsigned M_PSEUDO_FLAG = 1 << 14;
// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
const unsigned M_2_ADDR_FLAG = 1 << 15;
struct MachineInstrDescriptor {
const char * Name; // Assembly language mnemonic for the opcode.
@ -186,6 +187,9 @@ public:
bool isPseudoInstr(const MachineOpCode opCode) const {
return get(opCode).Flags & M_PSEUDO_FLAG;
}
bool isTwoAddrInstr(const MachineOpCode opCode) const {
return get(opCode).Flags & M_2_ADDR_FLAG;
}
// Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued

View File

@ -54,7 +54,8 @@ const unsigned M_PREFETCH_FLAG = 1 << 11;
const unsigned M_STORE_FLAG = 1 << 12;
const unsigned M_DUMMY_PHI_FLAG = 1 << 13;
const unsigned M_PSEUDO_FLAG = 1 << 14;
// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
const unsigned M_2_ADDR_FLAG = 1 << 15;
struct MachineInstrDescriptor {
const char * Name; // Assembly language mnemonic for the opcode.
@ -186,6 +187,9 @@ public:
bool isPseudoInstr(const MachineOpCode opCode) const {
return get(opCode).Flags & M_PSEUDO_FLAG;
}
bool isTwoAddrInstr(const MachineOpCode opCode) const {
return get(opCode).Flags & M_2_ADDR_FLAG;
}
// Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued