6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-10 02:29:32 +00:00
Code Issues Projects Releases Wiki Activity

Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME

Browse Source 
for handling the fixup necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117978 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-01 23:45:50 +00:00
parent a502423d1e
commit 9af3d1c0dc
1 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/ARM/ARMMCCodeEmitter.cpp
View File

@ -178,6 +178,15 @@ unsigned ARMMCCodeEmitter::getAddrModeImm12OpValue(const MCInst &MI,
// {11-0} = imm12 // {11-0} = imm12
const MCOperand &MO = MI.getOperand(OpIdx); const MCOperand &MO = MI.getOperand(OpIdx);
const MCOperand &MO1 = MI.getOperand(OpIdx + 1); const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
uint32_t Binary = 0;
// If The first operand isn't a register, we have a label reference.
if (!MO.isReg()) {
Binary |= ARM::PC << 13; // Rn is PC.
// FIXME: Add a fixup referencing the label.
return Binary;
}
unsigned Reg = getARMRegisterNumbering(MO.getReg()); unsigned Reg = getARMRegisterNumbering(MO.getReg());
int32_t Imm12 = MO1.getImm(); int32_t Imm12 = MO1.getImm();
bool isAdd = Imm12 >= 0; bool isAdd = Imm12 >= 0;
@ -187,7 +196,7 @@ unsigned ARMMCCodeEmitter::getAddrModeImm12OpValue(const MCInst &MI,
// Immediate is always encoded as positive. The 'U' bit controls add vs sub. // Immediate is always encoded as positive. The 'U' bit controls add vs sub.
if (Imm12 < 0) if (Imm12 < 0)
Imm12 = -Imm12; Imm12 = -Imm12;
uint32_t Binary = Imm12 & 0xfff; Binary = Imm12 & 0xfff;
if (isAdd) if (isAdd)
Binary |= (1 << 12); Binary |= (1 << 12);
Binary |= (Reg << 13); Binary |= (Reg << 13);