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zext / truncate is free on msp430. Inform codegen about this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93556 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -967,6 +967,31 @@ const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const {
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}
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}
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}
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}
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bool MSP430TargetLowering::isTruncateFree(const Type *Ty1,
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const Type *Ty2) const {
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if (!Ty1->isInteger() || !Ty2->isInteger())
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return false;
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return (Ty1->getPrimitiveSizeInBits() > Ty2->getPrimitiveSizeInBits());
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}
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bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
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if (!VT1.isInteger() || !VT2.isInteger())
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return false;
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return (VT1.getSizeInBits() > VT2.getSizeInBits());
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}
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bool MSP430TargetLowering::isZExtFree(const Type *Ty1, const Type *Ty2) const {
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// MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
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return 0 && Ty1->isInteger(8) && Ty2->isInteger(16);
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}
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bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
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// MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
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return 0 && VT1 == MVT::i8 && VT2 == MVT::i16;
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Other Lowering Code
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// Other Lowering Code
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -99,6 +99,23 @@ namespace llvm {
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std::pair<unsigned, const TargetRegisterClass*>
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std::pair<unsigned, const TargetRegisterClass*>
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getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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/// isTruncateFree - Return true if it's free to truncate a value of type
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/// Ty1 to type Ty2. e.g. On msp430 it's free to truncate a i16 value in
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/// register R15W to i8 by referencing its sub-register R15B.
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virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const;
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virtual bool isTruncateFree(EVT VT1, EVT VT2) const;
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/// isZExtFree - Return true if any actual instruction that defines a value
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/// of type Ty1 implicit zero-extends the value to Ty2 in the result
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/// register. This does not necessarily include registers defined in unknown
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/// ways, such as incoming arguments, or copies from unknown virtual
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/// registers. Also, if isTruncateFree(Ty2, Ty1) is true, this does not
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/// necessarily apply to truncate instructions. e.g. on msp430, all
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/// instructions that define 8-bit values implicit zero-extend the result
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/// out to 16 bits.
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virtual bool isZExtFree(const Type *Ty1, const Type *Ty2) const;
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virtual bool isZExtFree(EVT VT1, EVT VT2) const;
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MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB,
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MachineBasicBlock *BB,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
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