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Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as such.

Browse Source 
rdar://problem/9276651


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129462 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen 2011-04-13 19:46:05 +00:00
parent 65705d559a
commit 9bb386a933
3 changed files with 53 additions and 1 deletions
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34
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
View File

@ -1920,6 +1920,38 @@ static bool BadRegsThumb2LdSt(unsigned Opcode, uint32_t insn, bool Load,
DEBUG(errs() << "if t == 13 then UNPREDICTABLE\n");
return true;
}
// A6.3.8 Load halfword, memory hints
const StringRef Name = ARMInsts[Opcode].Name;
if (Name.startswith("t2LDRH") || Name.startswith("t2LDRSH")) {
if (WB) {
if (R0 == R1) {
// A8.6.82 LDRSH (immediate) Encoding T2
DEBUG(errs() << "if WB && n == t then UNPREDICTABLE\n");
return true;
}
if (R0 == 15 && slice(insn, 10, 8) == 3) {
// A8.6.82 LDRSH (immediate) Encoding T2 (errata markup 8.0)
DEBUG(errs() << "if t == 15 && PUW == '011' then UNPREDICTABLE\n");
return true;
}
} else {
if (Opcode == ARM::t2LDRHi8 || Opcode == ARM::t2LDRSHi8) {
if (R0 == 15 && slice(insn, 10, 8) == 4) {
// A8.6.82 LDRSH (immediate) Encoding T2
DEBUG(errs() << "if Rt == '1111' and PUW == '100' then SEE"
<< " \"Unallocated memory hints\"\n");
return true;
}
} else {
if (R0 == 15) {
// A8.6.82 LDRSH (immediate) Encoding T1
DEBUG(errs() << "if Rt == '1111' then SEE"
<< " \"Unallocated memory hints\"\n");
return true;
}
}
}
}
} else {
if (WB && R0 == R1) {
DEBUG(errs() << "if wback && n == t then UNPREDICTABLE\n");
@ -1998,7 +2030,7 @@ static bool DisassembleThumb2LdSt(bool Load, MCInst &MI, unsigned Opcode,
bool Imm12 = !ThreeReg && slice(insn, 23, 23) == 1; // ARMInstrThumb2.td
// Build the register operands, followed by the immediate.
unsigned R0, R1, R2 = 0;
unsigned R0 = 0, R1 = 0, R2 = 0;
unsigned Rd = decodeRd(insn);
int Imm = 0;

10
test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt Normal file
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@ -0,0 +1,10 @@
# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=1953 Name=t2LDRSHi12 Format=ARM_FORMAT_THUMBFRM(25)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1| 1: 1: 1: 1| 1: 0: 0: 0| 1: 1: 0: 1| 1: 1: 1: 1|
# -------------------------------------------------------------------------------------------------
#
# if Rt = '1111' then SEE "Unallocated memory hints"
0xb3 0xf9 0xdf 0xf8

10
test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt Normal file
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@ -0,0 +1,10 @@
# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=1954 Name=t2LDRSHi8 Format=ARM_FORMAT_THUMBFRM(25)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 1: 0: 0: 1| 0: 0: 1: 1| 0: 1: 0: 1| 1: 1: 1: 1| 1: 1: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0|
# -------------------------------------------------------------------------------------------------
#
# if Rt == '1111' and PUW == '100' then SEE "Unallocated memory hints"
0x35 0xf9 0x00 0xfc