From 9c45251e1165a9ed8c351468ebb01b3859ea1df3 Mon Sep 17 00:00:00 2001
From: Duncan Sands <baldrick@free.fr>
Date: Sun, 27 Feb 2011 14:41:27 +0000
Subject: [PATCH] Legalize support for fpextend of vector.  PR9309.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126574 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 ++
 test/CodeGen/Generic/2011-02-27-Fpextend.ll      | 7 +++++++
 2 files changed, 9 insertions(+)
 create mode 100644 test/CodeGen/Generic/2011-02-27-Fpextend.ll

diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index 182f8fcbfbf..8e02e982ebf 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -440,6 +440,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
   case ISD::FCEIL:
   case ISD::FRINT:
   case ISD::FNEARBYINT:
+  case ISD::FP_EXTEND:
   case ISD::FP_TO_SINT:
   case ISD::FP_TO_UINT:
   case ISD::SINT_TO_FP:
@@ -2005,6 +2006,7 @@ bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
   case ISD::STORE:              Res = WidenVecOp_STORE(N); break;
 
   case ISD::FP_ROUND:
+  case ISD::FP_EXTEND:
   case ISD::FP_TO_SINT:
   case ISD::FP_TO_UINT:
   case ISD::SINT_TO_FP:
diff --git a/test/CodeGen/Generic/2011-02-27-Fpextend.ll b/test/CodeGen/Generic/2011-02-27-Fpextend.ll
new file mode 100644
index 00000000000..38a1e4e4144
--- /dev/null
+++ b/test/CodeGen/Generic/2011-02-27-Fpextend.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+; PR9309
+
+define <4 x double> @f_fu(<4 x float>) nounwind {
+  %float2double.i = fpext <4 x float> %0 to <4 x double>
+  ret <4 x double> %float2double.i
+}