From 9d1c1ada213c80135fbdda704175aae689daa6f9 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 4 Apr 2010 18:06:11 +0000 Subject: [PATCH] remove TargetMachine.h #include, also, TRI isn't used frequently enough to warrant caching in AsmPrinter, so remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100336 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/AsmPrinter.h | 5 ----- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 ++++--- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + lib/CodeGen/AsmPrinter/DwarfException.cpp | 1 + lib/CodeGen/AsmPrinter/DwarfPrinter.cpp | 1 + lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 9 +++++---- lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index a46fa4955cd..212b1c1c8e9 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -18,7 +18,6 @@ #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/Support/DebugLoc.h" -#include "llvm/Target/TargetMachine.h" namespace llvm { class BlockAddress; @@ -84,10 +83,6 @@ namespace llvm { /// const MCAsmInfo *MAI; - /// Target Register Information. - /// - const TargetRegisterInfo *TRI; - /// OutContext - This is the context for the output file that we are /// streaming. This owns all of the global MC-related objects for the /// generated translation unit. diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 9007d0d0beb..2a8e3eee459 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -65,7 +65,7 @@ static gcp_map_type &getGCMap(void *&P) { AsmPrinter::AsmPrinter(TargetMachine &tm, MCStreamer &Streamer) : MachineFunctionPass(&ID), - TM(tm), MAI(tm.getMCAsmInfo()), TRI(tm.getRegisterInfo()), + TM(tm), MAI(tm.getMCAsmInfo()), OutContext(Streamer.getContext()), OutStreamer(Streamer), LastMI(0), LastFn(0), Counter(~0U), SetCounter(0) { @@ -1610,8 +1610,9 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const { /// that is an implicit def. void AsmPrinter::printImplicitDef(const MachineInstr *MI) const { if (!VerboseAsm) return; + unsigned RegNo = MI->getOperand(0).getReg(); OutStreamer.AddComment(Twine("implicit-def: ") + - TRI->getName(MI->getOperand(0).getReg())); + TM.getRegisterInfo()->getName(RegNo)); OutStreamer.AddBlankLine(); } @@ -1623,7 +1624,7 @@ void AsmPrinter::printKill(const MachineInstr *MI) const { const MachineOperand &Op = MI->getOperand(n); assert(Op.isReg() && "KILL instruction must have only register operands"); Str += ' '; - Str += TRI->getName(Op.getReg()); + Str += TM.getRegisterInfo()->getName(Op.getReg()); Str += (Op.isDef() ? "" : ""); } OutStreamer.AddComment(Str); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 07b35e2ba38..6d6071a3b5e 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -24,6 +24,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringExtras.h" diff --git a/lib/CodeGen/AsmPrinter/DwarfException.cpp b/lib/CodeGen/AsmPrinter/DwarfException.cpp index bf89cd6da18..60136cfe4a3 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfException.cpp @@ -27,6 +27,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Support/Dwarf.h" diff --git a/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp b/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp index 4106c7ae75a..2ae7d476b6a 100644 --- a/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp @@ -26,6 +26,7 @@ #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetMachine.h" #include "llvm/Support/Dwarf.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/ADT/SmallString.h" diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index def4ac18e36..18b309b8510 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -320,15 +320,16 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, unsigned Reg = MO.getReg(); assert(TargetRegisterInfo::isPhysicalRegister(Reg)); if (Modifier && strcmp(Modifier, "dregpair") == 0) { - unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0 - unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1 + unsigned DRegLo = TM.getRegisterInfo()->getSubReg(Reg, 5);// arm_dsubreg_0 + unsigned DRegHi = TM.getRegisterInfo()->getSubReg(Reg, 6);// arm_dsubreg_1 O << '{' << getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi) << '}'; } else if (Modifier && strcmp(Modifier, "lane") == 0) { unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg); - unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1, - &ARM::DPR_VFP2RegClass); + unsigned DReg = + TM.getRegisterInfo()->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1, + &ARM::DPR_VFP2RegClass); O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']'; } else { assert(!MO.getSubReg() && "Subregs should be eliminated!"); diff --git a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp index 17271e62461..b63caaef183 100644 --- a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp +++ b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp @@ -130,9 +130,9 @@ void SystemZAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, unsigned Reg = MO.getReg(); if (Modifier && strncmp(Modifier, "subreg", 6) == 0) { if (strncmp(Modifier + 7, "even", 4) == 0) - Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_EVEN); + Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_EVEN); else if (strncmp(Modifier + 7, "odd", 3) == 0) - Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_ODD); + Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_ODD); else assert(0 && "Invalid subreg modifier"); }