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Don't copy regs that are only used in the entry block into a vreg. This

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changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23109 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-08-26 22:49:59 +00:00
parent ed461e0faf
commit 9d3a483a38
1 changed files with 9 additions and 3 deletions
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12
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -1077,9 +1077,15 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
AI != E; ++AI,++a)
if (!AI->use_empty()) {
SDL.setValue(AI, Args[a]);
SDOperand Copy =
CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
UnorderedChains.push_back(Copy);
if (IsOnlyUsedInOneBasicBlock(AI) == F.begin()) {
// Only used in the entry block, no need to copy it to a vreg for
// other blocks.
} else {
SDOperand Copy =
CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
UnorderedChains.push_back(Copy);
}
}
} else {
// Otherwise, if any argument is only accessed in a single basic block,