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Adjust to new interfaces

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5314 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-01-15 21:14:01 +00:00
parent 0a166155e7
commit 9d4ed15c9e
4 changed files with 16 additions and 12 deletions
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8
lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
View File

@ -6,7 +6,7 @@
#include "llvm/CodeGen/LiveRangeInfo.h"
#include "RegAllocCommon.h"
#include "llvm/CodeGen/RegClass.h"
#include "RegClass.h"
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
@ -16,6 +16,8 @@
#include "Support/SetOperations.h"
using std::cerr;
unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
std::vector<RegClass *> &RCL)
: Meth(F), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
@ -93,7 +95,8 @@ LiveRangeInfo::createNewLiveRange(const Value* Def, bool isCC /* = false*/)
LiveRangeMap[Def] = DefRange; // and update the map.
// set the register class of the new live range
DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfValue(Def, isCC)]);
DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfType(Def->getType(),
isCC)]);
if (DEBUG_RA >= RA_DEBUG_LiveRanges) {
cerr << " Creating a LR for def ";
@ -280,7 +283,6 @@ void LiveRangeInfo::coalesceLRs()
continue;
if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
// If the two RegTypes are the same
if (!RCOfDef->getInterference(LROfDef, LROfUse) ) {

6
lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
View File

@ -6,8 +6,8 @@
#include "llvm/CodeGen/RegisterAllocation.h"
#include "RegAllocCommon.h"
#include "RegClass.h"
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/PhyRegAlloc.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
@ -654,7 +654,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
MachineOperand& Op = MInst->getOperand(OpNum);
bool isDef = MInst->operandIsDefined(OpNum);
bool isDefAndUse = MInst->operandIsDefinedAndUsed(OpNum);
unsigned RegType = MRI.getRegType( LR );
unsigned RegType = MRI.getRegType(LR);
int SpillOff = LR->getSpillOffFromFP();
RegClass *RC = LR->getRegClass();
const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
@ -888,7 +888,7 @@ void PhyRegAlloc::setRelRegsUsedByThisInst(RegClass *RC,
if (MInst->getOperandType(OpNum) == MachineOperand::MO_VirtualRegister ||
MInst->getOperandType(OpNum) == MachineOperand::MO_CCRegister)
if (const Value* Val = Op.getVRegValue())
if (MRI.getRegClassIDOfValue(Val) == RC->getID())
if (MRI.getRegClassIDOfType(Val->getType()) == RC->getID())
if (Op.getAllocatedRegNum() == -1)
if (LiveRange *LROfVal = LRI.getLiveRangeForValue(Val))
if (LROfVal->hasColor() )

8
lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
View File

@ -6,7 +6,7 @@
#include "llvm/CodeGen/LiveRangeInfo.h"
#include "RegAllocCommon.h"
#include "llvm/CodeGen/RegClass.h"
#include "RegClass.h"
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
@ -16,6 +16,8 @@
#include "Support/SetOperations.h"
using std::cerr;
unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
std::vector<RegClass *> &RCL)
: Meth(F), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
@ -93,7 +95,8 @@ LiveRangeInfo::createNewLiveRange(const Value* Def, bool isCC /* = false*/)
LiveRangeMap[Def] = DefRange; // and update the map.
// set the register class of the new live range
DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfValue(Def, isCC)]);
DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfType(Def->getType(),
isCC)]);
if (DEBUG_RA >= RA_DEBUG_LiveRanges) {
cerr << " Creating a LR for def ";
@ -280,7 +283,6 @@ void LiveRangeInfo::coalesceLRs()
continue;
if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
// If the two RegTypes are the same
if (!RCOfDef->getInterference(LROfDef, LROfUse) ) {

6
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
View File

@ -6,8 +6,8 @@
#include "llvm/CodeGen/RegisterAllocation.h"
#include "RegAllocCommon.h"
#include "RegClass.h"
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/PhyRegAlloc.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
@ -654,7 +654,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
MachineOperand& Op = MInst->getOperand(OpNum);
bool isDef = MInst->operandIsDefined(OpNum);
bool isDefAndUse = MInst->operandIsDefinedAndUsed(OpNum);
unsigned RegType = MRI.getRegType( LR );
unsigned RegType = MRI.getRegType(LR);
int SpillOff = LR->getSpillOffFromFP();
RegClass *RC = LR->getRegClass();
const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
@ -888,7 +888,7 @@ void PhyRegAlloc::setRelRegsUsedByThisInst(RegClass *RC,
if (MInst->getOperandType(OpNum) == MachineOperand::MO_VirtualRegister ||
MInst->getOperandType(OpNum) == MachineOperand::MO_CCRegister)
if (const Value* Val = Op.getVRegValue())
if (MRI.getRegClassIDOfValue(Val) == RC->getID())
if (MRI.getRegClassIDOfType(Val->getType()) == RC->getID())
if (Op.getAllocatedRegNum() == -1)
if (LiveRange *LROfVal = LRI.getLiveRangeForValue(Val))
if (LROfVal->hasColor() )