6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-18 10:31:57 +00:00
Code Issues Projects Releases Wiki Activity

Fix a merge bug in preRAsched for handling physreg aliases.

Browse Source 
I've been sitting on this long enough trying to find a test case. I
think the fix should go in now, but I'll keep working on the test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132701 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2011-06-07 00:38:12 +00:00
parent a1099f184d
commit 9d507aec07
1 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -1008,14 +1008,16 @@ static void CheckForLiveRegDef(SUnit *SU, unsigned Reg,
for (const unsigned *AliasI = TRI->getOverlaps(Reg); *AliasI; ++AliasI) {
// Check if Ref is live.
if (!LiveRegDefs[Reg]) continue;
if (!LiveRegDefs[*AliasI]) continue;
// Allow multiple uses of the same def.
if (LiveRegDefs[Reg] == SU) continue;
if (LiveRegDefs[*AliasI] == SU) continue;
// Add Reg to the set of interfering live regs.
if (RegAdded.insert(Reg))
LRegs.push_back(Reg);
if (RegAdded.insert(*AliasI)) {
assert(*AliasI == Reg && "alias clobber"); //!!!
LRegs.push_back(*AliasI);
}
}
}