From 9e036910f87570bce83a5bb3457b689a05868846 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Mon, 29 Jul 2013 11:02:08 +0000 Subject: [PATCH] Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2. PR16721. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187350 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Support/Host.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp index 40e7a494fdc..90e43894c3c 100644 --- a/lib/Support/Host.cpp +++ b/lib/Support/Host.cpp @@ -149,6 +149,7 @@ std::string sys::getHostCPUName() { DetectX86FamilyModel(EAX, Family, Model); bool HasSSE3 = (ECX & 0x1); + bool HasSSE41 = (ECX & 0x80000); // If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV // indicates that the AVX registers will be saved and restored on context // switch, then we have full AVX support. @@ -244,7 +245,8 @@ std::string sys::getHostCPUName() { // 17h. All processors are manufactured using the 45 nm process. // // 45nm: Penryn , Wolfdale, Yorkfield (XE) - return "penryn"; + // Not all Penryn processors support SSE 4.1 (such as the Pentium brand) + return HasSSE41 ? "penryn" : "core2"; case 26: // Intel Core i7 processor and Intel Xeon processor. All // processors are manufactured using the 45 nm process.