From 9e234856fe0c6fd1165d093a3c9ed4f163cba7b0 Mon Sep 17 00:00:00 2001
From: Andrew Lenharth <andrewl@lenharth.org>
Date: Thu, 26 Jan 2006 03:24:15 +0000
Subject: [PATCH] minor renaming

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25640 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Alpha/AlphaInstrFormats.td |  2 +-
 lib/Target/Alpha/AlphaInstrInfo.td    | 30 +++++++++++++--------------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/lib/Target/Alpha/AlphaInstrFormats.td b/lib/Target/Alpha/AlphaInstrFormats.td
index ac5481aed6c..7b43c2ac279 100644
--- a/lib/Target/Alpha/AlphaInstrFormats.td
+++ b/lib/Target/Alpha/AlphaInstrFormats.td
@@ -90,7 +90,7 @@ class BFormD<bits<6> opcode, string asmstr, list<dag> pattern>
   let Inst{20-0} = disp;
 }
 let isBranch = 1, isTerminator = 1 in
-class BFormDG<bits<6> opcode, string asmstr, list<dag> pattern> 
+class BForm<bits<6> opcode, string asmstr, list<dag> pattern> 
     : InstAlpha<opcode, (ops GPRC:$RA, target:$DISP), asmstr> {
   let Pattern = pattern;
 
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td
index fa0310fcd11..dec058ea9f9 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/lib/Target/Alpha/AlphaInstrInfo.td
@@ -764,21 +764,21 @@ let Ra = 31 in
 def BR : BFormD<0x30, "br $$31,$DISP", [(br bb:$DISP)]>;
 
 //Branches, int
-def BEQ  : BFormDG<0x39, "beq $RA,$DISP", 
-                   [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>;
-def BGE  : BFormDG<0x3E, "bge $RA,$DISP", 
-                   [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>;
-def BGT  : BFormDG<0x3F, "bgt $RA,$DISP",
-                   [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>;
-def BLBC : BFormDG<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear
-def BLBS : BFormDG<0x3C, "blbs $RA,$DISP",
-                   [(brcond (and GPRC:$RA, 1), bb:$DISP)]>;
-def BLE  : BFormDG<0x3B, "ble $RA,$DISP",
-                   [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>;
-def BLT  : BFormDG<0x3A, "blt $RA,$DISP",
-                   [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>;
-def BNE  : BFormDG<0x3D, "bne $RA,$DISP",
-                   [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>;
+def BEQ  : BForm<0x39, "beq $RA,$DISP", 
+                 [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>;
+def BGE  : BForm<0x3E, "bge $RA,$DISP", 
+                 [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>;
+def BGT  : BForm<0x3F, "bgt $RA,$DISP",
+                 [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>;
+def BLBC : BForm<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear
+def BLBS : BForm<0x3C, "blbs $RA,$DISP",
+                 [(brcond (and GPRC:$RA, 1), bb:$DISP)]>;
+def BLE  : BForm<0x3B, "ble $RA,$DISP",
+                 [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>;
+def BLT  : BForm<0x3A, "blt $RA,$DISP",
+                 [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>;
+def BNE  : BForm<0x3D, "bne $RA,$DISP",
+                 [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>;
 
 //Branches, float
 def FBEQ : FBForm<0x31, "fbeq $RA,$DISP",