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Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150873 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -229,19 +229,12 @@ namespace X86II {
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// destinations are the same register.
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MRMInitReg = 32,
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//// MRM_C1 - A mod/rm byte of exactly 0xC1.
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MRM_C1 = 33,
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MRM_C2 = 34,
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MRM_C3 = 35,
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MRM_C4 = 36,
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MRM_C8 = 37,
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MRM_C9 = 38,
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MRM_E8 = 39,
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MRM_F0 = 40,
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MRM_F8 = 41,
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MRM_F9 = 42,
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MRM_D0 = 45,
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MRM_D1 = 46,
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//// MRM_XX - A mod/rm byte of exactly 0xXX.
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MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36,
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MRM_C8 = 37, MRM_C9 = 38, MRM_E8 = 39, MRM_F0 = 40,
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MRM_F8 = 41, MRM_F9 = 42, MRM_D0 = 45, MRM_D1 = 46,
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MRM_D8 = 47, MRM_D9 = 48, MRM_DA = 49, MRM_DB = 50,
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MRM_DC = 51, MRM_DD = 52, MRM_DE = 53, MRM_DF = 54,
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/// RawFrmImm8 - This is used for the ENTER instruction, which has two
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/// immediates, the first of which is a 16-bit immediate (specified by
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@ -535,18 +528,16 @@ namespace X86II {
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++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV).
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return FirstMemOp;
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}
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case X86II::MRM_C1:
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case X86II::MRM_C2:
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case X86II::MRM_C3:
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case X86II::MRM_C4:
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case X86II::MRM_C8:
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case X86II::MRM_C9:
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case X86II::MRM_E8:
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case X86II::MRM_F0:
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case X86II::MRM_F8:
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case X86II::MRM_F9:
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case X86II::MRM_D0:
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case X86II::MRM_D1:
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case X86II::MRM_C1: case X86II::MRM_C2:
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case X86II::MRM_C3: case X86II::MRM_C4:
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case X86II::MRM_C8: case X86II::MRM_C9:
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case X86II::MRM_E8: case X86II::MRM_F0:
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case X86II::MRM_F8: case X86II::MRM_F9:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D8: case X86II::MRM_D9:
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case X86II::MRM_DA: case X86II::MRM_DB:
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case X86II::MRM_DC: case X86II::MRM_DD:
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case X86II::MRM_DE: case X86II::MRM_DF:
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return -1;
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}
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}
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@ -1058,53 +1058,43 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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TSFlags, CurByte, OS, Fixups);
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CurOp += X86::AddrNumOperands;
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break;
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case X86II::MRM_C1:
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case X86II::MRM_C1: case X86II::MRM_C2:
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case X86II::MRM_C3: case X86II::MRM_C4:
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case X86II::MRM_C8: case X86II::MRM_C9:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D8: case X86II::MRM_D9:
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case X86II::MRM_DA: case X86II::MRM_DB:
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case X86II::MRM_DC: case X86II::MRM_DD:
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case X86II::MRM_DE: case X86II::MRM_DF:
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case X86II::MRM_E8: case X86II::MRM_F0:
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case X86II::MRM_F8: case X86II::MRM_F9:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC1, CurByte, OS);
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break;
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case X86II::MRM_C2:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC2, CurByte, OS);
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break;
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case X86II::MRM_C3:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC3, CurByte, OS);
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break;
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case X86II::MRM_C4:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC4, CurByte, OS);
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break;
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case X86II::MRM_C8:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC8, CurByte, OS);
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break;
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case X86II::MRM_C9:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC9, CurByte, OS);
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break;
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case X86II::MRM_E8:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xE8, CurByte, OS);
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break;
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case X86II::MRM_F0:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xF0, CurByte, OS);
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break;
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case X86II::MRM_F8:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xF8, CurByte, OS);
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break;
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case X86II::MRM_F9:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xF9, CurByte, OS);
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break;
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case X86II::MRM_D0:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xD0, CurByte, OS);
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break;
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case X86II::MRM_D1:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xD1, CurByte, OS);
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unsigned char MRM;
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switch (TSFlags & X86II::FormMask) {
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default: llvm_unreachable("Invalid Form");
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case X86II::MRM_C1: MRM = 0xC1; break;
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case X86II::MRM_C2: MRM = 0xC2; break;
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case X86II::MRM_C3: MRM = 0xC3; break;
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case X86II::MRM_C4: MRM = 0xC4; break;
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case X86II::MRM_C8: MRM = 0xC8; break;
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case X86II::MRM_C9: MRM = 0xC9; break;
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case X86II::MRM_D0: MRM = 0xD0; break;
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case X86II::MRM_D1: MRM = 0xD1; break;
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case X86II::MRM_D8: MRM = 0xD8; break;
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case X86II::MRM_D9: MRM = 0xD9; break;
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case X86II::MRM_DA: MRM = 0xDA; break;
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case X86II::MRM_DB: MRM = 0xDB; break;
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case X86II::MRM_DC: MRM = 0xDC; break;
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case X86II::MRM_DD: MRM = 0xDD; break;
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case X86II::MRM_DE: MRM = 0xDE; break;
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case X86II::MRM_DF: MRM = 0xDF; break;
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case X86II::MRM_E8: MRM = 0xE8; break;
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case X86II::MRM_F0: MRM = 0xF0; break;
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case X86II::MRM_F8: MRM = 0xF8; break;
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case X86II::MRM_F9: MRM = 0xF9; break;
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}
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EmitByte(MRM, CurByte, OS);
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break;
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}
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@ -43,6 +43,14 @@ def RawFrmImm8 : Format<43>;
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def RawFrmImm16 : Format<44>;
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def MRM_D0 : Format<45>;
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def MRM_D1 : Format<46>;
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def MRM_D8 : Format<47>;
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def MRM_D9 : Format<48>;
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def MRM_DA : Format<49>;
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def MRM_DB : Format<50>;
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def MRM_DC : Format<51>;
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def MRM_DD : Format<52>;
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def MRM_DE : Format<53>;
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def MRM_DF : Format<54>;
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// ImmType - This specifies the immediate type used by an instruction. This is
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// part of the ad-hoc solution used to emit machine instruction encodings by our
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@ -1538,6 +1538,7 @@ include "X86InstrMMX.td"
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include "X86Instr3DNow.td"
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include "X86InstrVMX.td"
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include "X86InstrSVM.td"
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// System instructions.
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include "X86InstrSystem.td"
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@ -52,6 +52,30 @@
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# CHECK: vmptrst
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0x0f 0xc7 0x38
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# CHECK: vmrun
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0x0f 0x01 0xd8
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# CHECK: vmmcall
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0x0f 0x01 0xd9
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# CHECK: vmload
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0x0f 0x01 0xda
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# CHECK: vmsave
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0x0f 0x01 0xdb
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# CHECK: stgi
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0x0f 0x01 0xdc
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# CHECK: clgi
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0x0f 0x01 0xdd
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# CHECK: skinit
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0x0f 0x01 0xde
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# CHECK: invlpga
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0x0f 0x01 0xdf
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# CHECK: movl $0, -4(%rbp)
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0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
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# CHECK: vmptrst
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0x0f 0xc7 0x38
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# CHECK: vmrun
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0x0f 0x01 0xd8
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# CHECK: vmmcall
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0x0f 0x01 0xd9
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# CHECK: vmload
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0x0f 0x01 0xda
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# CHECK: vmsave
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0x0f 0x01 0xdb
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# CHECK: stgi
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0x0f 0x01 0xdc
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# CHECK: clgi
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0x0f 0x01 0xdd
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# CHECK: skinit
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0x0f 0x01 0xde
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# CHECK: invlpga
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0x0f 0x01 0xdf
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# CHECK: movl $0, -4(%ebp)
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0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
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@ -18465,6 +18465,30 @@
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// CHECK: vmxon 305419896
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vmxon 0x12345678
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// CHECK: vmrun %eax
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vmrun %eax
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// CHECK: vmmcall
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vmmcall
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// CHECK: vmload %eax
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vmload %eax
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// CHECK: vmsave %eax
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vmsave %eax
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// CHECK: stgi
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stgi
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// CHECK: clgi
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clgi
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// CHECK: skinit %eax
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skinit %eax
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// CHECK: invlpga %ecx, %eax
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invlpga %ecx, %eax
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// CHECK: phaddw 3735928559(%ebx,%ecx,8), %mm3
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phaddw 0xdeadbeef(%ebx,%ecx,8),%mm3
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// CHECK: swapgs
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// CHECK: encoding: [0x0f,0x01,0xf8]
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vmrun %eax
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// CHECK: vmrun %eax
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// CHECK: encoding: [0x0f,0x01,0xd8]
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vmmcall
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// CHECK: vmmcall
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// CHECK: encoding: [0x0f,0x01,0xd9]
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vmload %eax
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// CHECK: vmload %eax
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// CHECK: encoding: [0x0f,0x01,0xda]
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vmsave %eax
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// CHECK: vmsave %eax
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// CHECK: encoding: [0x0f,0x01,0xdb]
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stgi
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// CHECK: stgi
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// CHECK: encoding: [0x0f,0x01,0xdc]
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clgi
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// CHECK: clgi
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// CHECK: encoding: [0x0f,0x01,0xdd]
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skinit %eax
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// CHECK: skinit %eax
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// CHECK: encoding: [0x0f,0x01,0xde]
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invlpga %ecx, %eax
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// CHECK: invlpga %ecx, %eax
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// CHECK: encoding: [0x0f,0x01,0xdf]
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rdtscp
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// CHECK: rdtscp
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// CHECK: encoding: [0x0f,0x01,0xf9]
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// ignore (doesn't go anywhere we know about)
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} else if (name.find("VMCALL") != name.npos) {
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// ignore (rather different semantics than a regular call)
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} else if (name.find("VMMCALL") != name.npos) {
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// ignore (rather different semantics than a regular call)
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} else if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
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CALL("off");
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} else {
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@ -36,7 +36,15 @@ using namespace llvm;
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MAP(F8, 41) \
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MAP(F9, 42) \
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MAP(D0, 45) \
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MAP(D1, 46)
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MAP(D1, 46) \
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MAP(D8, 47) \
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MAP(D9, 48) \
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MAP(DA, 49) \
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MAP(DB, 50) \
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MAP(DC, 51) \
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MAP(DD, 52) \
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MAP(DE, 53) \
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MAP(DF, 54)
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// A clone of X86 since we can't depend on something that is generated.
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namespace X86Local {
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