ARM] Add Thumb-2 code size optimization regression test for BIC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216880 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tilmann Scheller 2014-09-01 12:53:29 +00:00
parent 861eddb266
commit 9e6f09d7ce

View File

@ -27,3 +27,13 @@ entry:
%shr = ashr i32 %a, %b
ret i32 %shr
}
define i32 @bic(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: bic:
; CHECK: bic.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
; CHECK-OPT: bics r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
entry:
%neg = xor i32 %b, -1
%and = and i32 %neg, %a
ret i32 %and
}