6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-28 17:27:55 +00:00
Code Issues Projects Releases Wiki Activity

Merging r195399:

Browse Source 
------------------------------------------------------------------------
r195399 | tstellar | 2013-11-21 16:41:08 -0800 (Thu, 21 Nov 2013) | 10 lines

R600: Implement TargetInstrInfo::isLegalToSplitMBBAt()

Splitting a basic block will create a new ALU clause, so we need to make
sure we aren't moving uses of registers that are local to their
current clause into a new one.

I had a test case for this, but unfortunately unrelated schedule changes
invalidated it, and I wasn't been able to come up with another one.

NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195415 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2013-11-22 05:18:37 +00:00
parent f0061998dd
commit 9e78ba4ddc
2 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/R600/R600InstrInfo.cpp
View File

@ -77,6 +77,18 @@ R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
}
}
/// \returns true if \p MBBI can be moved into a new basic.
bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const {
for (MachineInstr::const_mop_iterator I = MBBI->operands_begin(),
E = MBBI->operands_end(); I != E; ++I) {
if (I->isReg() && !TargetRegisterInfo::isVirtualRegister(I->getReg()) &&
I->isUse() && RI.isPhysRegLiveAcrossClauses(I->getReg()))
return false;
}
return true;
}
unsigned R600InstrInfo::getIEQOpcode() const {
return AMDGPU::SETE_INT;
}

2
lib/Target/R600/R600InstrInfo.h
View File

@ -55,6 +55,8 @@ namespace llvm {
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const;
bool isTrig(const MachineInstr &MI) const;
bool isPlaceHolderOpcode(unsigned opcode) const;