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R600/SI: Use ELF64 format instead of ELF32
Reviewers: arsenm, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240331 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -127,11 +127,14 @@ bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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namespace {
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class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
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bool Is64Bit;
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public:
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ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
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ELFAMDGPUAsmBackend(const Target &T, bool Is64Bit) :
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AMDGPUAsmBackend(T), Is64Bit(Is64Bit) { }
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MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
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return createAMDGPUELFObjectWriter(OS);
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return createAMDGPUELFObjectWriter(Is64Bit, OS);
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}
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};
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@ -140,5 +143,8 @@ public:
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MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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const Triple &TT, StringRef CPU) {
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return new ELFAMDGPUAsmBackend(T);
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Triple TargetTriple(TT);
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// Use 64-bit ELF for amdgcn
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return new ELFAMDGPUAsmBackend(T, TargetTriple.getArch() == Triple::amdgcn);
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}
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@ -18,7 +18,7 @@ namespace {
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class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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AMDGPUELFObjectWriter();
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AMDGPUELFObjectWriter(bool Is64Bit);
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protected:
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unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel) const override {
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@ -30,10 +30,10 @@ protected:
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} // End anonymous namespace
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AMDGPUELFObjectWriter::AMDGPUELFObjectWriter()
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: MCELFObjectTargetWriter(false, 0, ELF::EM_AMDGPU, false) { }
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AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit)
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: MCELFObjectTargetWriter(Is64Bit, 0, ELF::EM_AMDGPU, false) { }
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MCObjectWriter *llvm::createAMDGPUELFObjectWriter(raw_pwrite_stream &OS) {
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MCELFObjectTargetWriter *MOTW = new AMDGPUELFObjectWriter();
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MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit, raw_pwrite_stream &OS) {
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MCELFObjectTargetWriter *MOTW = new AMDGPUELFObjectWriter(Is64Bit);
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return createELFObjectWriter(MOTW, OS, true);
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}
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@ -46,7 +46,8 @@ MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
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MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI,
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const Triple &TT, StringRef CPU);
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MCObjectWriter *createAMDGPUELFObjectWriter(raw_pwrite_stream &OS);
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MCObjectWriter *createAMDGPUELFObjectWriter(bool Is64Bit,
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raw_pwrite_stream &OS);
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} // namespace llvm
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#define GET_REGINFO_ENUM
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@ -8,7 +8,7 @@
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; Test that we don't try to produce a COFF file on windows
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; RUN: llc < %s -mtriple=amdgcn-pc-mingw -mcpu=SI -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols -file-headers - | FileCheck --check-prefix=ELF %s
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; ELF: Format: ELF32
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; ELF: Format: ELF64
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; ELF: Machine: EM_AMDGPU (0xE0)
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; ELF: Name: .AMDGPU.config
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; ELF: Type: SHT_PROGBITS
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