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smarter loads and stores. can now handle base+offset.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20055 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-02-06 15:40:40 +00:00
parent 0bc68a87e7
commit 9e8d1094f2
2 changed files with 271 additions and 173 deletions
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435
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -296,9 +296,34 @@ namespace {
unsigned SelectExpr(SDOperand N); unsigned SelectExpr(SDOperand N);
unsigned SelectExprFP(SDOperand N, unsigned Result); unsigned SelectExprFP(SDOperand N, unsigned Result);
void Select(SDOperand N); void Select(SDOperand N);
void SelectAddr(SDOperand N, unsigned& Reg, long& offset);
}; };
} }
//Check to see if the load is a constant offset from a base register
void ISel::SelectAddr(SDOperand N, unsigned& Reg, long& offset)
{
unsigned opcode = N.getOpcode();
if (opcode == ISD::ADD) {
if(N.getOperand(1).getOpcode() == ISD::Constant && cast<ConstantSDNode>(N.getOperand(1))->getValue() <= 32767)
{ //Normal imm add
Reg = SelectExpr(N.getOperand(0));
offset = cast<ConstantSDNode>(N.getOperand(1))->getValue();
return;
}
else if(N.getOperand(0).getOpcode() == ISD::Constant && cast<ConstantSDNode>(N.getOperand(0))->getValue() <= 32767)
{
Reg = SelectExpr(N.getOperand(1));
offset = cast<ConstantSDNode>(N.getOperand(0))->getValue();
return;
}
}
Reg = SelectExpr(N);
offset = 0;
return;
}
unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
{ {
unsigned Tmp1, Tmp2, Tmp3; unsigned Tmp1, Tmp2, Tmp3;
@ -373,10 +398,10 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
SDOperand Chain = N.getOperand(0); SDOperand Chain = N.getOperand(0);
SDOperand Address = N.getOperand(1); SDOperand Address = N.getOperand(1);
Select(Chain);
if (Address.getOpcode() == ISD::GlobalAddress) if (Address.getOpcode() == ISD::GlobalAddress)
{ {
Select(Chain);
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
Opc = DestType == MVT::f64 ? Alpha::LDT_SYM : Alpha::LDS_SYM; Opc = DestType == MVT::f64 ? Alpha::LDT_SYM : Alpha::LDS_SYM;
BuildMI(BB, Opc, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal()); BuildMI(BB, Opc, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
@ -388,10 +413,10 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
} }
else else
{ {
Select(Chain); long offset;
Tmp2 = SelectExpr(Address); SelectAddr(Address, Tmp1, offset);
Opc = DestType == MVT::f64 ? Alpha::LDT : Alpha::LDS; Opc = DestType == MVT::f64 ? Alpha::LDT : Alpha::LDS;
BuildMI(BB, Opc, 2, Result).addImm(0).addReg(Tmp2); BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
} }
return Result; return Result;
} }
@ -423,29 +448,42 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
return Result; return Result;
case ISD::EXTLOAD: case ISD::EXTLOAD:
//include a conversion sequence for float loads to double {
if (Result != notIn) //include a conversion sequence for float loads to double
ExprMap[N.getValue(1)] = notIn; // Generate the token if (Result != notIn)
else ExprMap[N.getValue(1)] = notIn; // Generate the token
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType()); else
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
Tmp2 = MakeReg(MVT::f32);
Tmp2 = MakeReg(MVT::f32);
assert(cast<MVTSDNode>(Node)->getExtraValueType() == MVT::f32 && "EXTLOAD not from f32");
assert(Node->getValueType(0) == MVT::f64 && "EXTLOAD not to f64"); assert(cast<MVTSDNode>(Node)->getExtraValueType() == MVT::f32 && "EXTLOAD not from f32");
assert(Node->getValueType(0) == MVT::f64 && "EXTLOAD not to f64");
if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N.getOperand(1))) {
AlphaLowering.restoreGP(BB); SDOperand Chain = N.getOperand(0);
BuildMI(BB, Alpha::LDS_SYM, 1, Tmp2).addConstantPoolIndex(CP->getIndex()); SDOperand Address = N.getOperand(1);
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp2); Select(Chain);
if (Address.getOpcode() == ISD::GlobalAddress)
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LDS_SYM, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N.getOperand(1)))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LDS_SYM, 1, Tmp2).addConstantPoolIndex(CP->getIndex());
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp2);
}
else
{
long offset;
SelectAddr(Address, Tmp1, offset);
BuildMI(BB, Alpha::LDS, 1, Tmp2).addImm(offset).addReg(Tmp1);
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp2);
}
return Result; return Result;
} }
Select(Node->getOperand(0)); // chain
Tmp1 = SelectExpr(Node->getOperand(1));
BuildMI(BB, Alpha::LDS, 1, Tmp2).addReg(Tmp1);
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp2);
return Result;
case ISD::UINT_TO_FP: case ISD::UINT_TO_FP:
case ISD::SINT_TO_FP: case ISD::SINT_TO_FP:
@ -521,7 +559,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
case ISD::ConstantPool: case ISD::ConstantPool:
Tmp1 = cast<ConstantPoolSDNode>(N)->getIndex(); Tmp1 = cast<ConstantPoolSDNode>(N)->getIndex();
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LOAD, 1, Result).addConstantPoolIndex(Tmp1); BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addConstantPoolIndex(Tmp1);
return Result; return Result;
case ISD::FrameIndex: case ISD::FrameIndex:
@ -530,91 +568,129 @@ unsigned ISel::SelectExpr(SDOperand N) {
return Result; return Result;
case ISD::EXTLOAD: case ISD::EXTLOAD:
// Make sure we generate both values. {
if (Result != notIn) // Make sure we generate both values.
ExprMap[N.getValue(1)] = notIn; // Generate the token if (Result != notIn)
else ExprMap[N.getValue(1)] = notIn; // Generate the token
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType()); else
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
Select(Node->getOperand(0)); // chain
Tmp1 = SelectExpr(Node->getOperand(1)); SDOperand Chain = N.getOperand(0);
SDOperand Address = N.getOperand(1);
switch(Node->getValueType(0)) { Select(Chain);
default: Node->dump(); assert(0 && "Unknown type to sign extend to.");
case MVT::i64: switch(Node->getValueType(0)) {
switch (cast<MVTSDNode>(Node)->getExtraValueType()) { default: Node->dump(); assert(0 && "Unknown type to sign extend to.");
default:
Node->dump();
assert(0 && "Bad extend load!");
case MVT::i64: case MVT::i64:
BuildMI(BB, Alpha::LDQ, 2, Result).addImm(0).addReg(Tmp1); switch (cast<MVTSDNode>(Node)->getExtraValueType()) {
break; default:
case MVT::i32: Node->dump();
BuildMI(BB, Alpha::LDL, 2, Result).addImm(0).addReg(Tmp1); assert(0 && "Bad extend load!");
break; case MVT::i64: Opc = Alpha::LDQ; break;
case MVT::i16: case MVT::i32: Opc = Alpha::LDL; break;
BuildMI(BB, Alpha::LDWU, 2, Result).addImm(0).addReg(Tmp1); case MVT::i16: Opc = Alpha::LDWU; break;
break; case MVT::i1: //FIXME: Treat i1 as i8 since there are problems otherwise
case MVT::i1: //FIXME: Treat i1 as i8 since there are problems otherwise case MVT::i8: Opc = Alpha::LDBU; break;
case MVT::i8: }
BuildMI(BB, Alpha::LDBU, 2, Result).addImm(0).addReg(Tmp1);
break;
} }
break;
if (Address.getOpcode() == ISD::GlobalAddress)
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Address))
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
else
{
long offset;
SelectAddr(Address, Tmp1, offset);
BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
}
return Result;
} }
return Result;
case ISD::SEXTLOAD: case ISD::SEXTLOAD:
// Make sure we generate both values. {
if (Result != notIn) // Make sure we generate both values.
ExprMap[N.getValue(1)] = notIn; // Generate the token if (Result != notIn)
else ExprMap[N.getValue(1)] = notIn; // Generate the token
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType()); else
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
Select(Node->getOperand(0)); // chain SDOperand Chain = N.getOperand(0);
Tmp1 = SelectExpr(Node->getOperand(1)); SDOperand Address = N.getOperand(1);
switch(Node->getValueType(0)) { Select(Chain);
default: Node->dump(); assert(0 && "Unknown type to sign extend to.");
case MVT::i64: switch(Node->getValueType(0)) {
switch (cast<MVTSDNode>(Node)->getExtraValueType()) { default: Node->dump(); assert(0 && "Unknown type to sign extend to.");
default: case MVT::i64:
Node->dump(); switch (cast<MVTSDNode>(Node)->getExtraValueType()) {
assert(0 && "Bad sign extend!"); default: Node->dump(); assert(0 && "Bad sign extend!");
case MVT::i32: case MVT::i32: Opc = Alpha::LDL; break;
BuildMI(BB, Alpha::LDL, 2, Result).addImm(0).addReg(Tmp1); }
break;
} }
break;
if (Address.getOpcode() == ISD::GlobalAddress)
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Address)) {
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
else
{
long offset;
SelectAddr(Address, Tmp1, offset);
BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
}
return Result;
} }
return Result;
case ISD::ZEXTLOAD: case ISD::ZEXTLOAD:
// Make sure we generate both values. {
if (Result != notIn) // Make sure we generate both values.
ExprMap[N.getValue(1)] = notIn; // Generate the token if (Result != notIn)
else ExprMap[N.getValue(1)] = notIn; // Generate the token
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType()); else
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());
Select(Node->getOperand(0)); // chain
Tmp1 = SelectExpr(Node->getOperand(1)); SDOperand Chain = N.getOperand(0);
switch(Node->getValueType(0)) { SDOperand Address = N.getOperand(1);
default: Node->dump(); assert(0 && "Unknown type to zero extend to."); Select(Chain);
case MVT::i64:
switch (cast<MVTSDNode>(Node)->getExtraValueType()) { switch(Node->getValueType(0)) {
default: default: Node->dump(); assert(0 && "Unknown type to zero extend to.");
Node->dump(); case MVT::i64:
assert(0 && "Bad sign extend!"); switch (cast<MVTSDNode>(Node)->getExtraValueType()) {
case MVT::i16: default: Node->dump(); assert(0 && "Bad sign extend!");
BuildMI(BB, Alpha::LDWU, 2, Result).addImm(0).addReg(Tmp1); case MVT::i16: Opc = Alpha::LDWU; break;
break; case MVT::i8: Opc = Alpha::LDBU; break;
case MVT::i8: }
BuildMI(BB, Alpha::LDBU, 2, Result).addImm(0).addReg(Tmp1);
break;
} }
break;
}
return Result;
if (Address.getOpcode() == ISD::GlobalAddress)
{
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Address)) {
AlphaLowering.restoreGP(BB);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
else
{
long offset;
SelectAddr(Address, Tmp1, offset);
BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
}
return Result;
}
case ISD::GlobalAddress: case ISD::GlobalAddress:
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
@ -1099,19 +1175,19 @@ unsigned ISel::SelectExpr(SDOperand N) {
case ISD::Constant: case ISD::Constant:
{ {
unsigned long val = cast<ConstantSDNode>(N)->getValue(); unsigned long val = cast<ConstantSDNode>(N)->getValue();
if (val < 32000 && (long)val > -32000) if (val < 32000 && (long)val > -32000)
BuildMI(BB, Alpha::LOAD_IMM, 1, Result).addImm(val); BuildMI(BB, Alpha::LOAD_IMM, 1, Result).addImm(val);
else else
{ {
MachineConstantPool *CP = BB->getParent()->getConstantPool(); MachineConstantPool *CP = BB->getParent()->getConstantPool();
ConstantUInt *C = ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , val); ConstantUInt *C = ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , val);
unsigned CPI = CP->getConstantPoolIndex(C); unsigned CPI = CP->getConstantPoolIndex(C);
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LOAD, 1, Result).addConstantPoolIndex(CPI); BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addConstantPoolIndex(CPI);
} }
return Result; return Result;
} }
case ISD::LOAD: case ISD::LOAD:
{ {
// Make sure we generate both values. // Make sure we generate both values.
@ -1122,24 +1198,24 @@ unsigned ISel::SelectExpr(SDOperand N) {
SDOperand Chain = N.getOperand(0); SDOperand Chain = N.getOperand(0);
SDOperand Address = N.getOperand(1); SDOperand Address = N.getOperand(1);
Select(Chain);
assert(N.getValue(0).getValueType() == MVT::i64 && "unknown Load dest type"); assert(N.getValue(0).getValueType() == MVT::i64 && "unknown Load dest type");
if (Address.getOpcode() == ISD::GlobalAddress) if (Address.getOpcode() == ISD::GlobalAddress)
{ {
Select(Chain);
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LOAD, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal()); BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
} }
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Address)) { else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Address)) {
AlphaLowering.restoreGP(BB); AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LOAD, 1, Result).addConstantPoolIndex(CP->getIndex()); BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addConstantPoolIndex(CP->getIndex());
} }
else else
{ {
Select(Chain); long offset;
Tmp2 = SelectExpr(Address); SelectAddr(Address, Tmp1, offset);
BuildMI(BB, Alpha::LDQ, 2, Result).addImm(0).addReg(Tmp2); BuildMI(BB, Alpha::LDQ, 2, Result).addImm(offset).addReg(Tmp1);
} }
return Result; return Result;
} }
@ -1243,36 +1319,37 @@ void ISel::Select(SDOperand N) {
case ISD::STORE: case ISD::STORE:
{ {
Select(N.getOperand(0)); SDOperand Chain = N.getOperand(0);
Tmp1 = SelectExpr(N.getOperand(1)); //value SDOperand Value = N.getOperand(1);
MVT::ValueType DestType = N.getOperand(1).getValueType(); SDOperand Address = N.getOperand(2);
if (N.getOperand(2).getOpcode() == ISD::GlobalAddress) Select(Chain);
{
AlphaLowering.restoreGP(BB); Tmp1 = SelectExpr(Value); //value
if (DestType == MVT::i64) Opc = Alpha::STORE; MVT::ValueType DestType = Value.getValueType();
else if (DestType == MVT::f64) Opc = Alpha::STT_SYM;
else if (DestType == MVT::f32) Opc = Alpha::STS_SYM; if (Address.getOpcode() == ISD::GlobalAddress)
else assert(0 && "unknown Type in store"); {
BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(N.getOperand(2))->getGlobal()); AlphaLowering.restoreGP(BB);
} switch(DestType) {
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N.getOperand(2))) default: assert(0 && "unknown Type in store");
{ case MVT::i64: Opc = Alpha::STQ_SYM; break;
AlphaLowering.restoreGP(BB); case MVT::f64: Opc = Alpha::STT_SYM; break;
if (DestType == MVT::i64) Opc = Alpha::STORE; case MVT::f32: Opc = Alpha::STS_SYM; break;
else if (DestType == MVT::f64) Opc = Alpha::STT_SYM; }
else if (DestType == MVT::f32) Opc = Alpha::STS_SYM; BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
else assert(0 && "unknown Type in store"); }
BuildMI(BB, Opc, 2).addReg(Tmp1).addConstantPoolIndex(CP->getIndex());
}
else else
{ {
Tmp2 = SelectExpr(N.getOperand(2)); //address switch(DestType) {
if (DestType == MVT::i64) Opc = Alpha::STQ; default: assert(0 && "unknown Type in store");
else if (DestType == MVT::f64) Opc = Alpha::STT; case MVT::i64: Opc = Alpha::STQ; break;
else if (DestType == MVT::f32) Opc = Alpha::STS; case MVT::f64: Opc = Alpha::STT; break;
else assert(0 && "unknown Type in store"); case MVT::f32: Opc = Alpha::STS; break;
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2); }
} long offset;
SelectAddr(Address, Tmp2, offset);
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2);
}
return; return;
} }
@ -1288,29 +1365,45 @@ void ISel::Select(SDOperand N) {
return; return;
case ISD::TRUNCSTORE: { // truncstore chain, val, ptr :storety case ISD::TRUNCSTORE:
MVT::ValueType StoredTy = cast<MVTSDNode>(Node)->getExtraValueType(); {
if (StoredTy == MVT::i64) { SDOperand Chain = N.getOperand(0);
Node->dump(); SDOperand Value = N.getOperand(1);
assert(StoredTy != MVT::i64 && "Unsupported TRUNCSTORE for this target!"); SDOperand Address = N.getOperand(2);
Select(Chain);
MVT::ValueType DestType = cast<MVTSDNode>(Node)->getExtraValueType();
Tmp1 = SelectExpr(Value); //value
if (Address.getOpcode() == ISD::GlobalAddress)
{
AlphaLowering.restoreGP(BB);
switch(DestType) {
default: assert(0 && "unknown Type in store");
case MVT::i1: //FIXME: DAG does not promote this load
case MVT::i8: Opc = Alpha::STB; break;
case MVT::i16: Opc = Alpha::STW; break;
case MVT::i32: Opc = Alpha::STL; break;
}
BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
else
{
switch(DestType) {
default: assert(0 && "unknown Type in store");
case MVT::i1: //FIXME: DAG does not promote this load
case MVT::i8: Opc = Alpha::STB; break;
case MVT::i16: Opc = Alpha::STW; break;
case MVT::i32: Opc = Alpha::STL; break;
}
long offset;
SelectAddr(Address, Tmp2, offset);
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2);
}
return;
} }
Select(N.getOperand(0));
Tmp1 = SelectExpr(N.getOperand(1));
Tmp2 = SelectExpr(N.getOperand(2));
switch (StoredTy) {
default: Node->dump(); assert(0 && "Unhandled Type");
case MVT::i1: //FIXME: DAG does not promote this load
case MVT::i8: Opc = Alpha::STB; break;
case MVT::i16: Opc = Alpha::STW; break;
case MVT::i32: Opc = Alpha::STL; break;
}
BuildMI(BB, Opc, 2).addReg(Tmp1).addImm(0).addReg(Tmp2);
return;
}
case ISD::ADJCALLSTACKDOWN: case ISD::ADJCALLSTACKDOWN:
case ISD::ADJCALLSTACKUP: case ISD::ADJCALLSTACKUP:
Select(N.getOperand(0)); Select(N.getOperand(0));

9
lib/Target/Alpha/AlphaInstrInfo.td
View File

@ -57,13 +57,18 @@ let Uses = [R28] in
def LOAD_IMM : PseudoInstAlpha<(ops GPRC:$RC, s64imm:$IMM), "ldiq $RC,$IMM">; //Load Immediate Quadword def LOAD_IMM : PseudoInstAlpha<(ops GPRC:$RC, s64imm:$IMM), "ldiq $RC,$IMM">; //Load Immediate Quadword
let Uses = [R29, R28] in { let Uses = [R29, R28] in {
def STORE : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stq $RA,$DISP">; //Store quadword
def LOAD_ADDR : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lda $RA,$DISP">; //Load address def LOAD_ADDR : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lda $RA,$DISP">; //Load address
def LOAD : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword def LDQ_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword
def LDW : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldw $RA,$DISP($RB)">; // Load sign-extended word def LDW : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldw $RA,$DISP($RB)">; // Load sign-extended word
def LDB : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldb $RA,$DISP($RB)">; //Load byte def LDB : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldb $RA,$DISP($RB)">; //Load byte
def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load float def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load float
def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load double def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load double
def STB_SYM : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP), "stb $RA,$DISP">; // Store byte
def STW_SYM : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP), "stw $RA,$DISP">; // Store word
def STL_SYM : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP), "stl $RA,$DISP">; // Store longword
def STQ_SYM : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP), "stq $RA,$DISP">; //Store quadword
def STS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "sts $RA,$DISP">; //store float def STS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "sts $RA,$DISP">; //store float
def STT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stt $RA,$DISP">; //store double def STT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stt $RA,$DISP">; //store double
} }