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During vector shuffle lowering, we sometimes commute a vector shuffle to try
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try unpck* and shufp* if that doesn't pan out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31186 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2954,10 +2954,9 @@ static bool isPSHUFHW_PSHUFLWMask(SDNode *N) {
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/// CommuteVectorShuffle - Swap vector_shuffle operandsas well as
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/// values in ther permute mask.
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static SDOperand CommuteVectorShuffle(SDOperand Op, SelectionDAG &DAG) {
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SDOperand V1 = Op.getOperand(0);
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SDOperand V2 = Op.getOperand(1);
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SDOperand Mask = Op.getOperand(2);
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static SDOperand CommuteVectorShuffle(SDOperand Op, SDOperand &V1,
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SDOperand &V2, SDOperand &Mask,
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SelectionDAG &DAG) {
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MVT::ValueType VT = Op.getValueType();
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MVT::ValueType MaskVT = Mask.getValueType();
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MVT::ValueType EltVT = MVT::getVectorBaseType(MaskVT);
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@ -2978,8 +2977,9 @@ static SDOperand CommuteVectorShuffle(SDOperand Op, SelectionDAG &DAG) {
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MaskVec.push_back(DAG.getConstant(Val - NumElems, EltVT));
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}
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std::swap(V1, V2);
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Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size());
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return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V2, V1, Mask);
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return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask);
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}
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/// ShouldXformToMOVHLPS - Return true if the node should be transformed to
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@ -3463,25 +3463,21 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
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if (ShouldXformToMOVHLPS(PermMask.Val) ||
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ShouldXformToMOVLP(V1.Val, V2.Val, PermMask.Val))
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return CommuteVectorShuffle(Op, DAG);
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return CommuteVectorShuffle(Op, V1, V2, PermMask, DAG);
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bool Commuted = false;
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V1IsSplat = isSplatVector(V1.Val);
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V2IsSplat = isSplatVector(V2.Val);
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if ((V1IsSplat || V1IsUndef) && !(V2IsSplat || V2IsUndef)) {
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Op = CommuteVectorShuffle(Op, DAG);
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V1 = Op.getOperand(0);
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V2 = Op.getOperand(1);
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PermMask = Op.getOperand(2);
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Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG);
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std::swap(V1IsSplat, V2IsSplat);
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std::swap(V1IsUndef, V2IsUndef);
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Commuted = true;
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}
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if (isCommutedMOVL(PermMask.Val, V2IsSplat, V2IsUndef)) {
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if (V2IsUndef) return V1;
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Op = CommuteVectorShuffle(Op, DAG);
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V1 = Op.getOperand(0);
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V2 = Op.getOperand(1);
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PermMask = Op.getOperand(2);
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Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG);
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if (V2IsSplat) {
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// V2 is a splat, so the mask may be malformed. That is, it may point
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// to any V2 element. The instruction selectior won't like this. Get
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@ -3515,13 +3511,17 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
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}
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// Normalize the node to match x86 shuffle ops if needed
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if (V2.getOpcode() != ISD::UNDEF)
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if (isCommutedSHUFP(PermMask.Val)) {
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Op = CommuteVectorShuffle(Op, DAG);
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V1 = Op.getOperand(0);
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V2 = Op.getOperand(1);
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PermMask = Op.getOperand(2);
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}
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if (V2.getOpcode() != ISD::UNDEF && isCommutedSHUFP(PermMask.Val))
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Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG);
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if (Commuted) {
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// Commute is back and try unpck* again.
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Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG);
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if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) ||
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X86::isUNPCKLMask(PermMask.Val) ||
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X86::isUNPCKHMask(PermMask.Val))
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return Op;
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}
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// If VT is integer, try PSHUF* first, then SHUFP*.
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if (MVT::isInteger(VT)) {
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