diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll index 2e4cb1fe7ed..cb90bf644d5 100644 --- a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll +++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll @@ -4,7 +4,9 @@ ; it makes a ton of annoying overlapping live ranges. This code should not ; cause spills! ; -; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled +; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s + +; CHECK-NOT: spilled target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll index ea2e6db61e1..ba83a8db839 100644 --- a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll +++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 | grep test.*1 +; RUN: llc < %s -march=x86 | FileCheck %s ; PR1016 +; CHECK: {{test.*1}} + define i32 @test(i32 %A, i32 %B, i32 %C) { %a = trunc i32 %A to i1 ; [#uses=1] %D = select i1 %a, i32 %B, i32 %C ; [#uses=1] diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll index 7528129971a..648718cc722 100644 --- a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll +++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86-64 | not grep 4294967112 +; RUN: llc < %s -march=x86-64 | FileCheck %s ; PR1348 +; CHECK-NOT: 4294967112 + %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) { diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll index 660d4fe7b19..5612d9eb282 100644 --- a/test/CodeGen/X86/2007-06-15-IntToMMX.ll +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw +; RUN: llc < %s -march=x86-64 -mattr=+mmx | FileCheck %s + +; CHECK: paddusw + @R = external global x86_mmx ; [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) { diff --git a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll index 62624a7e344..4f7ae327d1f 100644 --- a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 | not grep movl +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK-NOT: movl define zeroext i8 @t(i8 zeroext %x, i8 zeroext %y) { %tmp2 = add i8 %x, 2 diff --git a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll index 6997d535ff9..e8c957b1ff6 100644 --- a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll +++ b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -o - | grep sinl +; RUN: llc < %s -o - | FileCheck %s + +; CHECK: sinl target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll index 9ea34e27a17..5bec179534b 100644 --- a/test/CodeGen/X86/2009-02-25-CommuteBug.ll +++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll @@ -1,7 +1,9 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | FileCheck %s ; rdar://6608609 +; CHECK-NOT: commuted + define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone { entry: %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll index 0607eda271a..679a65d93d0 100644 --- a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll +++ b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll @@ -1,8 +1,10 @@ ; REQUIRES: asserts -; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded" +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | FileCheck %s ; XFAIL: * ; 69408 removed the opportunity for this optimization to work +; CHECK: {{Number of modref unfolded}} + %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 } %struct.anon = type { [16 x i64] } @K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2] diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index 08bf9e3f9f3..d104c875760 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic > %t2 -; RUN: grep "leaq.*TLSGD" %t2 -; RUN: grep "__tls_get_addr" %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s ; PR4004 +; CHECK: {{leaq.*TLSGD}} +; CHECK: {{__tls_get_addr}} + @i = thread_local global i32 15 define i32 @f() { diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index 3bb9124633d..d69bfa6e7eb 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin > %t -; RUN: not grep InlineAsm %t -; RUN: FileCheck %s < %t +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix CHK %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +; CHK-NOT: InlineAsm ; CHECK: foo: ; CHECK: bswapq diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll index e0165fb01b5..13046d8b3de 100644 --- a/test/CodeGen/X86/long-setcc.ll +++ b/test/CodeGen/X86/long-setcc.ll @@ -1,18 +1,31 @@ -; RUN: llc < %s -march=x86 | grep cmp | count 1 -; RUN: llc < %s -march=x86 | grep shr | count 1 -; RUN: llc < %s -march=x86 | grep xor | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s define i1 @t1(i64 %x) nounwind { %B = icmp slt i64 %x, 0 ret i1 %B } +; CHECK: t1 +; CHECK: shrl +; CHECK-NOT: shrl +; CHECK: ret + define i1 @t2(i64 %x) nounwind { %tmp = icmp ult i64 %x, 4294967296 ret i1 %tmp } +; CHECK: t2 +; CHECK: cmp +; CHECK-NOT: cmp +; CHECK: ret + define i1 @t3(i32 %x) nounwind { %tmp = icmp ugt i32 %x, -1 ret i1 %tmp } + +; CHECK: t3 +; CHECK: xor +; CHECK-NOT: xor +; CHECK: ret diff --git a/test/CodeGen/X86/lsr-normalization.ll b/test/CodeGen/X86/lsr-normalization.ll index 932141d0448..bbf8f010efd 100644 --- a/test/CodeGen/X86/lsr-normalization.ll +++ b/test/CodeGen/X86/lsr-normalization.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep div | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s ; rdar://8168938 ; This testcase involves SCEV normalization with the exit value from @@ -6,6 +6,9 @@ ; loop. The expression should be properly normalized and simplified, ; and require only a single division. +; CHECK: div +; CHECK-NOT: div + %0 = type { %0*, %0* } @0 = private constant [13 x i8] c"Result: %lu\0A\00" ; <[13 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll index 069737d4d10..339de310433 100644 --- a/test/CodeGen/X86/mul-legalize.ll +++ b/test/CodeGen/X86/mul-legalize.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 | grep 24576 +; RUN: llc < %s -march=x86 | FileCheck %s ; PR2135 +; CHECK: 24576 + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" @.str = constant [13 x i8] c"c45531m.adb\00\00" diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll index 29474c21f24..c8c2cd753e0 100644 --- a/test/CodeGen/X86/negative_zero.ll +++ b/test/CodeGen/X86/negative_zero.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s + +; CHECK: fchs define double @T() { diff --git a/test/CodeGen/X86/optimize-max-2.ll b/test/CodeGen/X86/optimize-max-2.ll index 8851c5b1a30..ce0843e4252 100644 --- a/test/CodeGen/X86/optimize-max-2.ll +++ b/test/CodeGen/X86/optimize-max-2.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: grep cmov %t | count 2 -; RUN: grep jne %t | count 1 +; RUN: llc < %s -march=x86-64 | grep cmov %t | count 2 +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: jne +; CHECK-NOT: jne ; LSR's OptimizeMax function shouldn't try to eliminate this max, because ; it has three operands. diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll index 2c855ce8da6..8b2f61e1e2d 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | FileCheck %s + +; CHECK-NOT: movl %struct.dpoint = type { double, double } diff --git a/test/CodeGen/X86/vec_set-D.ll b/test/CodeGen/X86/vec_set-D.ll index 3d6369e1c76..9c1e1acf0ba 100644 --- a/test/CodeGen/X86/vec_set-D.ll +++ b/test/CodeGen/X86/vec_set-D.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s + +; CHECK: movq define <4 x i32> @t(i32 %x, i32 %y) nounwind { %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0 diff --git a/test/CodeGen/X86/vec_set-I.ll b/test/CodeGen/X86/vec_set-I.ll index 64f36f99e4d..c5d6ab88a35 100644 --- a/test/CodeGen/X86/vec_set-I.ll +++ b/test/CodeGen/X86/vec_set-I.ll @@ -1,5 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s + +; CHECK-NOT: xorp +; CHECK: movd +; CHECK-NOT: xorp define void @t1() nounwind { %tmp298.i.i = load <4 x float>* null, align 16 diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll index cbf658888ce..75f89023509 100644 --- a/test/CodeGen/X86/x86-64-shortint.ll +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s | grep movswl +; RUN: llc < %s | FileCheck %s + +; CHECK: movswl target datalayout = "e-p:64:64" target triple = "x86_64-apple-darwin8"